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@@ -14,348 +14,138 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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-#ifndef __OMAP3EVM_CONFIG_H
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-#define __OMAP3EVM_CONFIG_H
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+#ifndef __CONFIG_H
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+#define __CONFIG_H
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-#include <asm/arch/cpu.h>
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-#include <asm/arch/omap.h>
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+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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-/* ----------------------------------------------------------------------------
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- * Supported U-Boot features
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- * ----------------------------------------------------------------------------
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- */
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-#define CONFIG_SYS_LONGHELP
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-
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-/* Allow to overwrite serial and ethaddr */
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-#define CONFIG_ENV_OVERWRITE
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-
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-/* Add auto-completion support */
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-#define CONFIG_AUTO_COMPLETE
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-
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-/* ----------------------------------------------------------------------------
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- * Supported hardware
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- * ----------------------------------------------------------------------------
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- */
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-
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-/* SPL */
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-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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-
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-/* Partition tables */
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-
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-/* USB
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- *
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- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
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- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
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- */
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-#define CONFIG_USB_OMAP3
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-#define CONFIG_USB_MUSB_HCD
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-/* #define CONFIG_USB_MUSB_UDC */
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-
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-/* NAND SPL */
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-#define CONFIG_SPL_NAND_SIMPLE
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-#define CONFIG_SPL_NAND_BASE
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-#define CONFIG_SPL_NAND_DRIVERS
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-#define CONFIG_SPL_NAND_ECC
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-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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-#define CONFIG_SYS_NAND_PAGE_COUNT 64
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-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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-#define CONFIG_SYS_NAND_OOBSIZE 64
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-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
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- 10, 11, 12, 13}
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-#define CONFIG_SYS_NAND_ECCSIZE 512
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-#define CONFIG_SYS_NAND_ECCBYTES 3
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-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
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-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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-
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-/*
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- * High level configuration options
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- */
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-
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-#define CONFIG_SDRC /* The chip has SDRC controller */
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-
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-/*
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- * Clock related definitions
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- */
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-#define V_OSCK 26000000 /* Clock output from T2 */
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-#define V_SCLK (V_OSCK >> 1)
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-
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-/*
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- * OMAP3 has 12 GP timers, they can be driven by the system clock
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- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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- * This rate is divided by a local divisor.
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- */
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-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
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-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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-
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-/* Size of environment - 128KB */
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-#define CONFIG_ENV_SIZE (128 << 10)
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-
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-/* Size of malloc pool */
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-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
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-
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-/*
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- * Physical Memory Map
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- * Note 1: CS1 may or may not be populated
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- * Note 2: SDRAM size is expected to be at least 32MB
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- */
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-#define CONFIG_NR_DRAM_BANKS 2
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-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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-
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-/* Limits for memtest */
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-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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- 0x01F00000) /* 31MB */
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-
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-/* Default load address */
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-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
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-
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-/* -----------------------------------------------------------------------------
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- * Hardware drivers
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- * -----------------------------------------------------------------------------
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- */
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-
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-/*
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- * NS16550 Configuration
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- */
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-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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-
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-#define CONFIG_SYS_NS16550_SERIAL
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-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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-
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-/*
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- * select serial console configuration
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- */
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-#define CONFIG_CONS_INDEX 1
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-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
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-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
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-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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- 115200}
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-
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-/*
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- * I2C
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- */
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-#define CONFIG_SYS_I2C
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-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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+#include <configs/ti_omap3_common.h>
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/*
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- * PISMO support
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+ * We are only ever GP parts and will utilize all of the "downloaded image"
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+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
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*/
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-/* Monitor at start of flash - Reserve 2 sectors */
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-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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-
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-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
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-
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-/* Start location & size of environment */
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-#define ONENAND_ENV_OFFSET 0x260000
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-#define SMNAND_ENV_OFFSET 0x260000
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+#undef CONFIG_SPL_TEXT_BASE
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+#define CONFIG_SPL_TEXT_BASE 0x40200000
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-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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-
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-/*
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- * NAND
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- */
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-/* Physical address to access NAND */
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-#define CONFIG_SYS_NAND_ADDR NAND_BASE
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-
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-/* Physical address to access NAND at CS0 */
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-#define CONFIG_SYS_NAND_BASE NAND_BASE
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-
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-/* Max number of NAND devices */
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-#define CONFIG_SYS_MAX_NAND_DEVICE 1
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-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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-/* Timeout values (in ticks) */
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-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
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-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
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-
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-/* Flash banks JFFS2 should use */
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-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
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- CONFIG_SYS_MAX_NAND_DEVICE)
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-
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-#define CONFIG_SYS_JFFS2_MEM_NAND
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-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
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-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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-
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-#define CONFIG_JFFS2_NAND
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-/* nand device jffs2 lives on */
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-#define CONFIG_JFFS2_DEV "nand0"
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-/* Start of jffs2 partition */
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-#define CONFIG_JFFS2_PART_OFFSET 0x680000
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-/* Size of jffs2 partition */
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-#define CONFIG_JFFS2_PART_SIZE 0xf980000
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-
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-/*
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- * USB
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- */
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-#ifdef CONFIG_USB_OMAP3
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-
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-#ifdef CONFIG_USB_MUSB_HCD
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-
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-#ifdef CONFIG_USB_KEYBOARD
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-#define CONFIG_SYS_USB_EVENT_POLL
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-#define CONFIG_PREBOOT "usb start"
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-#endif /* CONFIG_USB_KEYBOARD */
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-
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-#endif /* CONFIG_USB_MUSB_HCD */
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-
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-#ifdef CONFIG_USB_MUSB_UDC
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-/* USB device configuration */
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-#define CONFIG_USB_DEVICE
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-#define CONFIG_USB_TTY
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-
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-/* Change these to suit your needs */
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-#define CONFIG_USBD_VENDORID 0x0451
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-#define CONFIG_USBD_PRODUCTID 0x5678
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-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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-#define CONFIG_USBD_PRODUCT_NAME "EVM"
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-#endif /* CONFIG_USB_MUSB_UDC */
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-
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-#endif /* CONFIG_USB_OMAP3 */
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-
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-/* ----------------------------------------------------------------------------
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- * U-Boot features
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- * ----------------------------------------------------------------------------
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- */
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-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
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+#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_MISC_INIT_R
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-
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-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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+#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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-/* Size of Console IO buffer */
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-#define CONFIG_SYS_CBSIZE 512
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-
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-/* Size of print buffer */
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-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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- sizeof(CONFIG_SYS_PROMPT) + 16)
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-
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-/* Size of bootarg buffer */
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-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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-#define CONFIG_BOOTFILE "uImage"
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+/* Override OMAP3 serial console configuration */
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+#undef CONFIG_CONS_INDEX
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+#define CONFIG_CONS_INDEX 1
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+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
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+#if defined(CONFIG_SPL_BUILD)
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+#undef CONFIG_SYS_NS16550_REG_SIZE
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+#else /* !CONFIG_SPL_BUILD */
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+#define CONFIG_SYS_NS16550_REG_SIZE (-1)
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+#endif /* CONFIG_SPL_BUILD */
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-/*
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- * NAND / OneNAND
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- */
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-#if defined(CONFIG_CMD_NAND)
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+/* NAND */
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+#if defined(CONFIG_NAND)
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+#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_FLASH_BASE NAND_BASE
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+#define CONFIG_SYS_MAX_NAND_DEVICE 1
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+#define CONFIG_BCH
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+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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+#define CONFIG_SYS_NAND_PAGE_COUNT 64
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+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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+#define CONFIG_SYS_NAND_OOBSIZE 64
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+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
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+ 10, 11, 12, 13}
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+#define CONFIG_SYS_NAND_ECCSIZE 512
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+#define CONFIG_SYS_NAND_ECCBYTES 3
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+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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+#define CONFIG_ENV_IS_IN_NAND 1
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+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
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+#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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+#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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+#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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+#define CONFIG_ENV_OVERWRITE
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+#define CONFIG_SPL_OMAP3_ID_NAND
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+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
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+#endif /* CONFIG_NAND */
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-#define CONFIG_NAND_OMAP_GPMC
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-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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-#elif defined(CONFIG_CMD_ONENAND)
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-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
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-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
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-#endif
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+#define CONFIG_USB_OMAP3
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-#if !defined(CONFIG_ENV_IS_NOWHERE)
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-#if defined(CONFIG_CMD_NAND)
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-#elif defined(CONFIG_CMD_ONENAND)
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-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
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-#endif
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-#endif /* CONFIG_ENV_IS_NOWHERE */
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+/* MUSB */
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+#define CONFIG_USB_MUSB_OMAP2PLUS
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+#define CONFIG_USB_MUSB_PIO_ONLY
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+#define CONFIG_USB_ETHER
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+#define CONFIG_USB_ETHER_RNDIS
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-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
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+/* USB EHCI */
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+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
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+/* SMSC911x Ethernet */
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#if defined(CONFIG_CMD_NET)
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-
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-/* Ethernet (SMSC9115 from SMSC9118 family) */
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_32_BIT
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-#define CONFIG_SMC911X_BASE 0x2C000000
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-
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-/* BOOTP fields */
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-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
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-#define CONFIG_BOOTP_GATEWAY 0x00000002
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-#define CONFIG_BOOTP_HOSTNAME 0x00000004
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-#define CONFIG_BOOTP_BOOTPATH 0x00000010
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-
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+#define CONFIG_SMC911X_BASE 0x2C000000
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#endif /* CONFIG_CMD_NET */
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-/* Support for relocation */
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-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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- CONFIG_SYS_INIT_RAM_SIZE - \
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- GENERATED_GBL_DATA_SIZE)
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-
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-/* -----------------------------------------------------------------------------
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- * Board specific
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- * -----------------------------------------------------------------------------
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- */
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-
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-/* Uncomment to define the board revision statically */
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-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
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-
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-/* Defines for SPL */
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-#define CONFIG_SPL_FRAMEWORK
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-#define CONFIG_SPL_TEXT_BASE 0x40200800
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-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
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- CONFIG_SPL_TEXT_BASE)
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-
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-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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-
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-#define CONFIG_SPL_OMAP3_ID_NAND
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-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
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-
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-/*
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- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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- * 64 bytes before this address should be set aside for u-boot.img's
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- * header. That is 0x800FFFC0--0x80100000 should not be used for any
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- * other needs.
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- */
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-#define CONFIG_SYS_TEXT_BASE 0x80100000
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-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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-
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-/* -----------------------------------------------------------------------------
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- * Default environment
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- * -----------------------------------------------------------------------------
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- */
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+/* Environment */
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+#define CONFIG_PREBOOT "usb start"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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+ DEFAULT_LINUX_BOOT_ENV \
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+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"loadaddr=0x82000000\0" \
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"usbtty=cdc_acm\0" \
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"mmcdev=0\0" \
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"console=ttyO0,115200n8\0" \
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"mmcargs=setenv bootargs console=${console} " \
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+ "${optargs} " \
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"root=/dev/mmcblk0p2 rw " \
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- "rootfstype=ext3 rootwait\0" \
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+ "rootfstype=ext4 rootwait\0" \
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"nandargs=setenv bootargs console=${console} " \
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- "root=/dev/mtdblock4 rw " \
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- "rootfstype=jffs2\0" \
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+ "${optargs} " \
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+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
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+ "rootfstype=ubifs rootwait\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source ${loadaddr}\0" \
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- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
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- "mmcboot=echo Booting from mmc ...; " \
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+ "loaduimage=setenv bootfile uImage; " \
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+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
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+ "loadzimage=setenv bootfile zImage; " \
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+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
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+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
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+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
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+ "run mmcargs; " \
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+ "bootm ${loadaddr} - ${fdtaddr}\0" \
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+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
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"run mmcargs; " \
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- "bootm ${loadaddr}\0" \
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- "nandboot=echo Booting from nand ...; " \
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+ "bootz ${loadaddr} - ${fdtaddr}\0" \
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+ "nandboot=echo Booting uImage from nand ...; " \
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"run nandargs; " \
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- "onenand read ${loadaddr} 280000 400000; " \
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- "bootm ${loadaddr}\0" \
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+ "nand read ${loadaddr} kernel; " \
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+ "nand read ${fdtaddr} dtb; " \
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|
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+ "bootm ${loadaddr} - ${fdtaddr}\0"
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|
#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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|
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"run bootscript; " \
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"else " \
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- "if run loaduimage; then " \
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- "run mmcboot; " \
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|
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- "else run nandboot; " \
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|
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- "fi; " \
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|
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+ "if run loadzimage && run loaddtb; then " \
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|
|
+ "run mmcbootz; fi; " \
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|
|
+ "if run loaduimage && run loaddtb; then " \
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+ "run mmcboot; fi; " \
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|
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+ "run nandboot; " \
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|
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"fi; " \
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"else run nandboot; fi"
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-#endif /* __OMAP3EVM_CONFIG_H */
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+#endif /* __CONFIG_H */
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