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@@ -5,161 +5,258 @@
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*/
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#include <common.h>
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-
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+#include <dm.h>
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+#include <errno.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/mpc8xxx_spi.h>
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+#include <asm-generic/gpio.h>
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+
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+enum {
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+ SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */
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+ SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */
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+};
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+
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+enum {
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+ SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */
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+ SPI_MODE_CI = BIT(31 - 2), /* Clock invert */
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+ SPI_MODE_CP = BIT(31 - 3), /* Clock phase */
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+ SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */
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+ SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */
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+ SPI_MODE_MS = BIT(31 - 6), /* Always master */
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+ SPI_MODE_EN = BIT(31 - 7), /* Enable interface */
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+
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+ SPI_MODE_LEN_MASK = 0xf00000,
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+ SPI_MODE_PM_MASK = 0xf0000,
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+
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+ SPI_COM_LST = BIT(31 - 9),
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+};
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+
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+struct mpc8xxx_priv {
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+ spi8xxx_t *spi;
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+ struct gpio_desc gpios[16];
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+ int max_cs;
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+};
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+
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+static inline u32 to_prescale_mod(u32 val)
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+{
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+ return (min(val, (u32)15) << 16);
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+}
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-#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
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-#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
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-
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-#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
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-#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
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-#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
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-#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
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+static void set_char_len(spi8xxx_t *spi, u32 val)
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+{
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+ clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20));
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+}
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#define SPI_TIMEOUT 1000
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-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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- unsigned int max_hz, unsigned int mode)
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+static int __spi_set_speed(spi8xxx_t *spi, uint speed)
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{
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- struct spi_slave *slave;
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+ /* TODO(mario.six@gdsys.cc): This only ever sets one fixed speed */
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- if (!spi_cs_is_valid(bus, cs))
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- return NULL;
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+ /* Use SYSCLK / 8 (16.67MHz typ.) */
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+ clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
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- slave = spi_alloc_slave_base(bus, cs);
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- if (!slave)
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- return NULL;
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-
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- /*
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- * TODO: Some of the code in spi_init() should probably move
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- * here, or into spi_claim_bus() below.
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- */
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-
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- return slave;
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+ return 0;
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}
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-void spi_free_slave(struct spi_slave *slave)
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+static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev)
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{
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- free(slave);
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+ struct mpc8xxx_priv *priv = dev_get_priv(dev);
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+ int ret;
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+
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+ priv->spi = (spi8xxx_t *)dev_read_addr(dev);
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+
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+ /* TODO(mario.six@gdsys.cc): Read clock and save the value */
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+
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+ ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
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+ ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW);
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+ if (ret < 0)
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+ return -EINVAL;
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+
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+ priv->max_cs = ret;
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+
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+ return 0;
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}
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-void spi_init(void)
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+static int mpc8xxx_spi_probe(struct udevice *dev)
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{
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- volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
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+ struct mpc8xxx_priv *priv = dev_get_priv(dev);
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/*
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* SPI pins on the MPC83xx are not muxed, so all we do is initialize
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* some registers
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*/
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- spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
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- spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8
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- (16.67MHz typ.) */
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- spi->event = 0xffffffff; /* Clear all SPI events */
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- spi->mask = 0x00000000; /* Mask all SPI interrupts */
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- spi->com = 0; /* LST bit doesn't do anything, so disregard */
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+ out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
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+
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+ __spi_set_speed(priv->spi, 16666667);
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+
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+ /* Clear all SPI events */
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+ setbits_be32(&priv->spi->event, 0xffffffff);
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+ /* Mask all SPI interrupts */
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+ clrbits_be32(&priv->spi->mask, 0xffffffff);
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+ /* LST bit doesn't do anything, so disregard */
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+ out_be32(&priv->spi->com, 0);
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+
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+ return 0;
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}
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-int spi_claim_bus(struct spi_slave *slave)
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+static void mpc8xxx_spi_cs_activate(struct udevice *dev)
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{
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- return 0;
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+ struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
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+ struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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+
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+ dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
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+ dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
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}
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-void spi_release_bus(struct spi_slave *slave)
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+static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
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{
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+ struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
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+ struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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+ dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
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+ dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
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}
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-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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- void *din, unsigned long flags)
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+static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
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+ const void *dout, void *din, ulong flags)
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{
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- volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
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- unsigned int tmpdout, tmpdin, event;
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- int numBlks = DIV_ROUND_UP(bitlen, 32);
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- int tm, isRead = 0;
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- unsigned char charSize = 32;
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+ struct udevice *bus = dev->parent;
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+ struct mpc8xxx_priv *priv = dev_get_priv(bus);
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+ spi8xxx_t *spi = priv->spi;
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+ struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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+ u32 tmpdin = 0;
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+ int num_blks = DIV_ROUND_UP(bitlen, 32);
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- debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
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- slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
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+ debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
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+ bus->name, platdata->cs, *(uint *)dout, *(uint *)din, bitlen);
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if (flags & SPI_XFER_BEGIN)
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- spi_cs_activate(slave);
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+ mpc8xxx_spi_cs_activate(dev);
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+
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+ /* Clear all SPI events */
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+ setbits_be32(&spi->event, 0xffffffff);
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+
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+ /* Handle data in 32-bit chunks */
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+ while (num_blks--) {
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+ u32 tmpdout = 0;
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+ uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
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+ ulong start;
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- spi->event = 0xffffffff; /* Clear all SPI events */
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+ clrbits_be32(&spi->mode, SPI_MODE_EN);
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- /* handle data in 32-bit chunks */
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- while (numBlks--) {
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- tmpdout = 0;
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- charSize = (bitlen >= 32 ? 32 : bitlen);
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+ /* Set up length for this transfer */
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+
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+ if (bitlen <= 4) /* 4 bits or less */
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+ set_char_len(spi, 3);
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+ else if (bitlen <= 16) /* at most 16 bits */
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+ set_char_len(spi, bitlen - 1);
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+ else /* more than 16 bits -> full 32 bit transfer */
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+ set_char_len(spi, 0);
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+
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+ setbits_be32(&spi->mode, SPI_MODE_EN);
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/* Shift data so it's msb-justified */
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- tmpdout = *(u32 *) dout >> (32 - charSize);
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-
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- /* The LEN field of the SPMODE register is set as follows:
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- *
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- * Bit length setting
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- * len <= 4 3
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- * 4 < len <= 16 len - 1
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- * len > 16 0
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- */
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+ tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
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- spi->mode &= ~SPI_MODE_EN;
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-
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- if (bitlen <= 16) {
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- if (bitlen <= 4)
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- spi->mode = (spi->mode & 0xff0fffff) |
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- (3 << 20);
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- else
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- spi->mode = (spi->mode & 0xff0fffff) |
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- ((bitlen - 1) << 20);
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- } else {
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- spi->mode = (spi->mode & 0xff0fffff);
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+ if (bitlen > 32) {
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/* Set up the next iteration if sending > 32 bits */
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bitlen -= 32;
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dout += 4;
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}
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- spi->mode |= SPI_MODE_EN;
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+ /* Write the data out */
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+ out_be32(&spi->tx, tmpdout);
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- spi->tx = tmpdout; /* Write the data out */
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- debug("*** spi_xfer: ... %08x written\n", tmpdout);
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+ debug("*** %s: ... %08x written\n", __func__, tmpdout);
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/*
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* Wait for SPI transmit to get out
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* or time out (1 second = 1000 ms)
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* The NE event must be read and cleared first
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*/
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- for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
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- event = spi->event;
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- if (event & SPI_EV_NE) {
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- tmpdin = spi->rx;
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- spi->event |= SPI_EV_NE;
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- isRead = 1;
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-
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- *(u32 *) din = (tmpdin << (32 - charSize));
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- if (charSize == 32) {
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- /* Advance output buffer by 32 bits */
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- din += 4;
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- }
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+ start = get_timer(0);
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+ do {
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+ u32 event = in_be32(&spi->event);
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+ bool have_ne = event & SPI_EV_NE;
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+ bool have_nf = event & SPI_EV_NF;
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+
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+ if (!have_ne)
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+ continue;
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+
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+ tmpdin = in_be32(&spi->rx);
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+ setbits_be32(&spi->event, SPI_EV_NE);
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+
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+ *(u32 *)din = (tmpdin << (32 - xfer_bitlen));
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+ if (xfer_bitlen == 32) {
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+ /* Advance output buffer by 32 bits */
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+ din += 4;
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}
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+
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/*
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* Only bail when we've had both NE and NF events.
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* This will cause timeouts on RO devices, so maybe
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* in the future put an arbitrary delay after writing
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* the device. Arbitrary delays suck, though...
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*/
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- if (isRead && (event & SPI_EV_NF))
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+ if (have_nf)
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break;
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+
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+ mdelay(1);
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+ } while (get_timer(start) < SPI_TIMEOUT);
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+
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+ if (get_timer(start) >= SPI_TIMEOUT) {
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+ debug("*** %s: Time out during SPI transfer\n",
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+ __func__);
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+ return -ETIMEDOUT;
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}
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- if (tm >= SPI_TIMEOUT)
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- puts("*** spi_xfer: Time out during SPI transfer");
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- debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
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+ debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
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}
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if (flags & SPI_XFER_END)
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- spi_cs_deactivate(slave);
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+ mpc8xxx_spi_cs_deactivate(dev);
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return 0;
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}
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+
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+static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed)
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+{
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+ struct mpc8xxx_priv *priv = dev_get_priv(dev);
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+
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+ return __spi_set_speed(priv->spi, speed);
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+}
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+
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+static int mpc8xxx_spi_set_mode(struct udevice *dev, uint mode)
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+{
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+ /* TODO(mario.six@gdsys.cc): Using SPI_CPHA (for clock phase) and
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+ * SPI_CPOL (for clock polarity) should work
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+ */
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+ return 0;
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+}
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+
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+static const struct dm_spi_ops mpc8xxx_spi_ops = {
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+ .xfer = mpc8xxx_spi_xfer,
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+ .set_speed = mpc8xxx_spi_set_speed,
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+ .set_mode = mpc8xxx_spi_set_mode,
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+ /*
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+ * cs_info is not needed, since we require all chip selects to be
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+ * in the device tree explicitly
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+ */
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+};
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+
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+static const struct udevice_id mpc8xxx_spi_ids[] = {
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+ { .compatible = "fsl,spi" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(mpc8xxx_spi) = {
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+ .name = "mpc8xxx_spi",
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+ .id = UCLASS_SPI,
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+ .of_match = mpc8xxx_spi_ids,
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+ .ops = &mpc8xxx_spi_ops,
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+ .ofdata_to_platdata = mpc8xxx_spi_ofdata_to_platdata,
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+ .probe = mpc8xxx_spi_probe,
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+ .priv_auto_alloc_size = sizeof(struct mpc8xxx_priv),
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+};
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