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@@ -0,0 +1,232 @@
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+// SPDX-License-Identifier: (GPL-2.0)
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+/*
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+ * support for the imx6 based aristainetos2c-cslb board
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+ *
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+ * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
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+ * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
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+ *
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+ */
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/clock/imx6qdl-clock.h>
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+
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+#include "imx6qdl-aristainetos2-common.dtsi"
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+
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+/ {
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_gpio>;
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+
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+ LED_blue {
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+ label = "led_blue";
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+ gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ LED_green {
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+ label = "led_green";
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+ gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ LED_red {
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+ label = "led_red";
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+ gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ LED_yellow {
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+ label = "led_yellow";
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+ gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ LED_blue_2 {
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+ label = "led_blue2";
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+ gpios = <&expander 15 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ LED_green_2 {
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+ label = "led_green2";
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+ gpios = <&expander 14 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ LED_red_2 {
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+ label = "led_red2";
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+ gpios = <&expander 12 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ LED_yellow_2 {
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+ label = "led_yellow2";
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+ gpios = <&expander 13 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ LED_ena {
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+ label = "led_ena";
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+ gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&ecspi1 {
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+ fsl,spi-num-chipselects = <3>;
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+ cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH
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+ &gpio4 10 GPIO_ACTIVE_HIGH
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+ &gpio4 11 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_ecspi1>;
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+ status = "okay";
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+ pinctrl-assert-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
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+ pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
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+
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+ flash: m25p80@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "micron,n25q128a11", "jedec,spi-nor";
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+ spi-max-frequency = <20000000>;
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+ reg = <0>;
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+ };
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+};
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+
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+&ecspi4 {
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+ fsl,spi-num-chipselects = <2>;
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+ cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_ecspi4>;
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ tpm@20 {
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+ compatible = "infineon,slb9645tt";
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+ reg = <0x20>;
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+ };
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+};
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+
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+&gpio7 {
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+ eMMC_reset {
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+ gpio-hog;
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+ output-high;
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+ gpios = <8 GPIO_ACTIVE_HIGH>;
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+ };
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+};
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+
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+&usdhc1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_usdhc1>;
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+ cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+&usdhc2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_usdhc2>;
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+ bus-width = <8>;
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+ no-1-8-v;
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+ non-removable;
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+ status = "okay";
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+};
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+
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+&iomuxc {
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+ pinctrl_ecspi1: ecspi1grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
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+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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+ /* SS0# */
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+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
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+ /* SS1# */
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+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1
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+ /* SS2# */
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+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1
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+ /* WP pin NOR Flash */
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+ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0
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+ /* Flash nReset */
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+ MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
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+ >;
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+ };
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+
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+ pinctrl_ecspi4: ecspi4grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
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+ MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
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+ MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
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+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
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+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
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+ >;
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+ };
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+
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+ pinctrl_gpio: gpiogrp {
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+ fsl,pins = <
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+ /* led enable */
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+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
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+ /* LCD power enable */
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+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
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+ /* led yellow */
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+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
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+ /* led red */
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+ MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x4001b0b0
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+ /* led green */
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+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
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+ /* led blue */
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+ MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
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+ /* Profibus IRQ */
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+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
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+ /* FPGA IRQ currently unused*/
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+ MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
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+ /* Display reset because of clock failure */
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+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
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+ /* spi bus #2 SS driver enable */
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+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
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+ /* RST_LOC# PHY reset input (has pull-down!)*/
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+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
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+ /* Touchscreen IRQ */
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+ MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
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+ /* PCIe reset */
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+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
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+ /* make sure pin is GPIO and not ENET_REF_CLK */
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+ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001a0b0
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+ /* TPM PP */
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+ MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x4001b0b0
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+ /* TPM Reset */
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+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x4001b0b0
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+ /* eMMC Reset# */
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+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
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+ >;
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+ };
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+
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+ pinctrl_usbotg: usbotggrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
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+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
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+ >;
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+ };
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+
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+ pinctrl_usdhc1: usdhc1grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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+ /* SD1 card detect input */
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+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
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+ >;
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+ };
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+
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+ pinctrl_usdhc2: usdhc2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
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+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
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+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
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+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
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+ >;
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+ };
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+};
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