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@@ -1,458 +0,0 @@
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-/*
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- * Device Tree Source for UniPhier sLD3 SoC
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- *
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- * Copyright (C) 2015-2016 Socionext Inc.
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- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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- *
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- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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- */
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-
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-/ {
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- compatible = "socionext,uniphier-sld3";
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- #address-cells = <1>;
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- #size-cells = <1>;
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-
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- cpus {
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- #address-cells = <1>;
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- #size-cells = <0>;
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-
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- cpu@0 {
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- device_type = "cpu";
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- compatible = "arm,cortex-a9";
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- reg = <0>;
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- enable-method = "psci";
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- next-level-cache = <&l2>;
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- };
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-
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- cpu@1 {
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- device_type = "cpu";
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- compatible = "arm,cortex-a9";
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- reg = <1>;
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- enable-method = "psci";
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- next-level-cache = <&l2>;
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- };
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- };
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-
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- psci {
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- compatible = "arm,psci-0.2";
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- method = "smc";
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- };
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-
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- clocks {
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- refclk: ref {
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- #clock-cells = <0>;
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- compatible = "fixed-clock";
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- clock-frequency = <24576000>;
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- };
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-
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- arm_timer_clk: arm_timer_clk {
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- #clock-cells = <0>;
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- compatible = "fixed-clock";
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- clock-frequency = <50000000>;
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- };
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- };
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-
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- soc {
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- compatible = "simple-bus";
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- #address-cells = <1>;
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- #size-cells = <1>;
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- ranges;
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- interrupt-parent = <&intc>;
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- u-boot,dm-pre-reloc;
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-
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- timer@20000200 {
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- compatible = "arm,cortex-a9-global-timer";
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- reg = <0x20000200 0x20>;
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- interrupts = <1 11 0x304>;
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- clocks = <&arm_timer_clk>;
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- };
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-
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- timer@20000600 {
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- compatible = "arm,cortex-a9-twd-timer";
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- reg = <0x20000600 0x20>;
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- interrupts = <1 13 0x304>;
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- clocks = <&arm_timer_clk>;
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- };
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-
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- intc: interrupt-controller@20001000 {
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- compatible = "arm,cortex-a9-gic";
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- #interrupt-cells = <3>;
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- interrupt-controller;
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- reg = <0x20001000 0x1000>,
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- <0x20000100 0x100>;
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- };
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-
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- l2: l2-cache@500c0000 {
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- compatible = "socionext,uniphier-system-cache";
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- reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
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- <0x506c0000 0x400>;
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- interrupts = <0 174 4>, <0 175 4>;
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- cache-unified;
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- cache-size = <(512 * 1024)>;
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- cache-sets = <256>;
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- cache-line-size = <128>;
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- cache-level = <2>;
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- };
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-
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- serial0: serial@54006800 {
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- compatible = "socionext,uniphier-uart";
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- status = "disabled";
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- reg = <0x54006800 0x40>;
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- interrupts = <0 33 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_uart0>;
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- clocks = <&sys_clk 0>;
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- clock-frequency = <36864000>;
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- };
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-
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- serial1: serial@54006900 {
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- compatible = "socionext,uniphier-uart";
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- status = "disabled";
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- reg = <0x54006900 0x40>;
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- interrupts = <0 35 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_uart1>;
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- clocks = <&sys_clk 0>;
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- clock-frequency = <36864000>;
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- };
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-
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- serial2: serial@54006a00 {
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- compatible = "socionext,uniphier-uart";
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- status = "disabled";
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- reg = <0x54006a00 0x40>;
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- interrupts = <0 37 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_uart2>;
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- clocks = <&sys_clk 0>;
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- clock-frequency = <36864000>;
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- };
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-
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- port0x: gpio@55000008 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000008 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port1x: gpio@55000010 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000010 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port2x: gpio@55000018 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000018 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port3x: gpio@55000020 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000020 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port4: gpio@55000028 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000028 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port5x: gpio@55000030 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000030 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port6x: gpio@55000038 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000038 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port7x: gpio@55000040 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000040 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port8x: gpio@55000048 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000048 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port9x: gpio@55000050 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000050 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port10x: gpio@55000058 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000058 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port11x: gpio@55000060 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000060 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port12x: gpio@55000068 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000068 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port13x: gpio@55000070 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000070 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port14x: gpio@55000078 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000078 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- port16x: gpio@55000088 {
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- compatible = "socionext,uniphier-gpio";
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- reg = <0x55000088 0x8>;
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- gpio-controller;
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- #gpio-cells = <2>;
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- };
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-
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- i2c0: i2c@58400000 {
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- compatible = "socionext,uniphier-i2c";
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- status = "disabled";
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- reg = <0x58400000 0x40>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- interrupts = <0 41 1>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_i2c0>;
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- clocks = <&sys_clk 1>;
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- clock-frequency = <100000>;
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- };
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-
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- i2c1: i2c@58480000 {
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- compatible = "socionext,uniphier-i2c";
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- status = "disabled";
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- reg = <0x58480000 0x40>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- interrupts = <0 42 1>;
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- clocks = <&sys_clk 1>;
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- clock-frequency = <100000>;
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- };
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-
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- i2c2: i2c@58500000 {
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- compatible = "socionext,uniphier-i2c";
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- status = "disabled";
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- reg = <0x58500000 0x40>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- interrupts = <0 43 1>;
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- clocks = <&sys_clk 1>;
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- clock-frequency = <100000>;
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- };
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-
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- i2c3: i2c@58580000 {
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- compatible = "socionext,uniphier-i2c";
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- status = "disabled";
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- reg = <0x58580000 0x40>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- interrupts = <0 44 1>;
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- clocks = <&sys_clk 1>;
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- clock-frequency = <100000>;
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- };
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-
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- /* chip-internal connection for DMD */
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- i2c4: i2c@58600000 {
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- compatible = "socionext,uniphier-i2c";
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- reg = <0x58600000 0x40>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- interrupts = <0 45 1>;
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- clocks = <&sys_clk 1>;
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- clock-frequency = <400000>;
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- };
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-
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- system_bus: system-bus@58c00000 {
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- compatible = "socionext,uniphier-system-bus";
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- status = "disabled";
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- reg = <0x58c00000 0x400>;
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- #address-cells = <2>;
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- #size-cells = <1>;
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- };
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-
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- smpctrl@59801000 {
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- compatible = "socionext,uniphier-smpctrl";
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- reg = <0x59801000 0x400>;
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- };
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-
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- mioctrl@59810000 {
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- compatible = "socionext,uniphier-sld3-mioctrl",
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- "simple-mfd", "syscon";
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- reg = <0x59810000 0x800>;
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- u-boot,dm-pre-reloc;
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-
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- mio_clk: clock {
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- compatible = "socionext,uniphier-sld3-mio-clock";
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- #clock-cells = <1>;
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- u-boot,dm-pre-reloc;
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- };
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-
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- mio_rst: reset {
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- compatible = "socionext,uniphier-sld3-mio-reset";
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- #reset-cells = <1>;
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- };
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- };
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-
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- emmc: sdhc@5a400000 {
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- compatible = "socionext,uniphier-sdhc";
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- status = "disabled";
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- reg = <0x5a400000 0x200>;
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- interrupts = <0 78 4>;
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- pinctrl-names = "default", "1.8v";
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- pinctrl-0 = <&pinctrl_emmc>;
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- pinctrl-1 = <&pinctrl_emmc_1v8>;
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- clocks = <&mio_clk 1>;
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- reset-names = "host", "bridge";
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- resets = <&mio_rst 1>, <&mio_rst 4>;
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- bus-width = <8>;
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- non-removable;
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- cap-mmc-highspeed;
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- cap-mmc-hw-reset;
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- };
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-
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- sd: sdhc@5a500000 {
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- compatible = "socionext,uniphier-sdhc";
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- status = "disabled";
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- reg = <0x5a500000 0x200>;
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- interrupts = <0 76 4>;
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- pinctrl-names = "default", "1.8v";
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- pinctrl-0 = <&pinctrl_sd>;
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- pinctrl-1 = <&pinctrl_sd_1v8>;
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- clocks = <&mio_clk 0>;
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- reset-names = "host", "bridge";
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- resets = <&mio_rst 0>, <&mio_rst 3>;
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- bus-width = <4>;
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- cap-sd-highspeed;
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- sd-uhs-sdr12;
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- sd-uhs-sdr25;
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- sd-uhs-sdr50;
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- };
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-
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- usb0: usb@5a800100 {
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- compatible = "socionext,uniphier-ehci", "generic-ehci";
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- status = "disabled";
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- reg = <0x5a800100 0x100>;
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- interrupts = <0 80 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_usb0>;
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- clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
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- resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
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- <&mio_rst 12>;
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- };
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-
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- usb1: usb@5a810100 {
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- compatible = "socionext,uniphier-ehci", "generic-ehci";
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- status = "disabled";
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- reg = <0x5a810100 0x100>;
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- interrupts = <0 81 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_usb1>;
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- clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
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- resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
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- <&mio_rst 13>;
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- };
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-
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- usb2: usb@5a820100 {
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- compatible = "socionext,uniphier-ehci", "generic-ehci";
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- status = "disabled";
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- reg = <0x5a820100 0x100>;
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- interrupts = <0 82 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_usb2>;
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- clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
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- resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
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- <&mio_rst 14>;
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- };
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-
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- usb3: usb@5a830100 {
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- compatible = "socionext,uniphier-ehci", "generic-ehci";
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- status = "disabled";
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- reg = <0x5a830100 0x100>;
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- interrupts = <0 83 4>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_usb3>;
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- clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>;
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- resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>,
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- <&mio_rst 15>;
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- };
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-
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|
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- soc-glue@5f800000 {
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- compatible = "socionext,uniphier-sld3-soc-glue",
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- "simple-mfd", "syscon";
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- reg = <0x5f800000 0x2000>;
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- u-boot,dm-pre-reloc;
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-
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- pinctrl: pinctrl {
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- compatible = "socionext,uniphier-sld3-pinctrl";
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- u-boot,dm-pre-reloc;
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|
|
- };
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|
- };
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|
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-
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|
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- aidet@f1830000 {
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|
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- compatible = "simple-mfd", "syscon";
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|
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- reg = <0xf1830000 0x200>;
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|
|
- };
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|
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-
|
|
|
- sysctrl@f1840000 {
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|
|
- compatible = "socionext,uniphier-sld3-sysctrl",
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|
|
- "simple-mfd", "syscon";
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|
|
- reg = <0xf1840000 0x10000>;
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|
|
-
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|
|
- sys_clk: clock {
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|
|
- compatible = "socionext,uniphier-sld3-clock";
|
|
|
- #clock-cells = <1>;
|
|
|
- };
|
|
|
-
|
|
|
- sys_rst: reset {
|
|
|
- compatible = "socionext,uniphier-sld3-reset";
|
|
|
- #reset-cells = <1>;
|
|
|
- };
|
|
|
- };
|
|
|
-
|
|
|
- nand: nand@f8000000 {
|
|
|
- compatible = "socionext,uniphier-denali-nand-v5a";
|
|
|
- status = "disabled";
|
|
|
- reg-names = "nand_data", "denali_reg";
|
|
|
- reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
|
|
|
- interrupts = <0 65 4>;
|
|
|
- clocks = <&sys_clk 2>;
|
|
|
- nand-ecc-strength = <8>;
|
|
|
- };
|
|
|
- };
|
|
|
-};
|
|
|
-
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|
-/include/ "uniphier-pinctrl.dtsi"
|