socfpgaimage.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
  4. *
  5. * Reference documents:
  6. * Cyclone V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
  7. * Arria V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
  8. * Arria 10 SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
  9. *
  10. * Bootable SoCFPGA image requires a structure of the following format
  11. * positioned at offset 0x40 of the bootable image. Endian is LSB.
  12. *
  13. * There are two versions of the SoCFPGA header format, v0 and v1.
  14. * The version 0 is used by Cyclone V SoC and Arria V SoC, while
  15. * the version 1 is used by the Arria 10 SoC.
  16. *
  17. * Version 0:
  18. * Offset Length Usage
  19. * -----------------------
  20. * 0x40 4 Validation word (0x31305341)
  21. * 0x44 1 Version (0x0)
  22. * 0x45 1 Flags (unused, zero is fine)
  23. * 0x46 2 Length (in units of u32, including the end checksum).
  24. * 0x48 2 Zero (0x0)
  25. * 0x4A 2 Checksum over the header. NB Not CRC32
  26. *
  27. * Version 1:
  28. * Offset Length Usage
  29. * -----------------------
  30. * 0x40 4 Validation word (0x31305341)
  31. * 0x44 1 Version (0x1)
  32. * 0x45 1 Flags (unused, zero is fine)
  33. * 0x46 2 Header length (in units of u8).
  34. * 0x48 4 Length (in units of u8).
  35. * 0x4C 4 Image entry offset from standard of header
  36. * 0x50 2 Zero (0x0)
  37. * 0x52 2 Checksum over the header. NB Not CRC32
  38. *
  39. * At the end of the code we have a 32-bit CRC checksum over whole binary
  40. * excluding the CRC.
  41. *
  42. * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
  43. * CRC-32 used in bzip2, ethernet and elsewhere.
  44. *
  45. * The Image entry offset in version 1 image is relative the the start of
  46. * the header, 0x40, and must not be a negative number. Therefore, it is
  47. * only possible to make the SoCFPGA jump forward. The U-Boot bootloader
  48. * places a trampoline instruction at offset 0x5c, 0x14 bytes from the
  49. * start of the SoCFPGA header, which jumps to the reset vector.
  50. *
  51. * The image is padded out to 64k, because that is what is
  52. * typically used to write the image to the boot medium.
  53. */
  54. #include "pbl_crc32.h"
  55. #include "imagetool.h"
  56. #include "mkimage.h"
  57. #include <u-boot/crc.h>
  58. #include <image.h>
  59. #define HEADER_OFFSET 0x40
  60. #define VALIDATION_WORD 0x31305341
  61. /* Minimum and default entry point offset */
  62. #define ENTRY_POINT_OFFSET 0x14
  63. static uint8_t buffer_v0[0x10000];
  64. static uint8_t buffer_v1[0x40000];
  65. struct socfpga_header_v0 {
  66. uint32_t validation;
  67. uint8_t version;
  68. uint8_t flags;
  69. uint16_t length_u32;
  70. uint16_t zero;
  71. uint16_t checksum;
  72. };
  73. struct socfpga_header_v1 {
  74. uint32_t validation;
  75. uint8_t version;
  76. uint8_t flags;
  77. uint16_t header_u8;
  78. uint32_t length_u8;
  79. uint32_t entry_offset;
  80. uint16_t zero;
  81. uint16_t checksum;
  82. };
  83. static unsigned int sfp_hdr_size(uint8_t ver)
  84. {
  85. if (ver == 0)
  86. return sizeof(struct socfpga_header_v0);
  87. if (ver == 1)
  88. return sizeof(struct socfpga_header_v1);
  89. return 0;
  90. }
  91. static unsigned int sfp_pad_size(uint8_t ver)
  92. {
  93. if (ver == 0)
  94. return sizeof(buffer_v0);
  95. if (ver == 1)
  96. return sizeof(buffer_v1);
  97. return 0;
  98. }
  99. /*
  100. * The header checksum is just a very simple checksum over
  101. * the header area.
  102. * There is still a crc32 over the whole lot.
  103. */
  104. static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
  105. {
  106. uint16_t ret = 0;
  107. int len = sfp_hdr_size(ver) - sizeof(ret);
  108. while (--len)
  109. ret += *buf++;
  110. return ret;
  111. }
  112. static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
  113. uint32_t length_bytes,
  114. struct image_tool_params *params)
  115. {
  116. uint32_t entry_offset = params->eflag ? params->ep : ENTRY_POINT_OFFSET;
  117. struct socfpga_header_v0 header_v0 = {
  118. .validation = cpu_to_le32(VALIDATION_WORD),
  119. .version = 0,
  120. .flags = flags,
  121. .length_u32 = cpu_to_le16(length_bytes / 4),
  122. .zero = 0,
  123. };
  124. struct socfpga_header_v1 header_v1 = {
  125. .validation = cpu_to_le32(VALIDATION_WORD),
  126. .version = 1,
  127. .flags = flags,
  128. .header_u8 = cpu_to_le16(sizeof(header_v1)),
  129. .length_u8 = cpu_to_le32(length_bytes),
  130. /* Trampoline offset */
  131. .entry_offset = cpu_to_le32(entry_offset),
  132. .zero = 0,
  133. };
  134. uint16_t csum;
  135. if (ver == 0) {
  136. csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
  137. header_v0.checksum = cpu_to_le16(csum);
  138. memcpy(buf, &header_v0, sizeof(header_v0));
  139. } else {
  140. csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
  141. header_v1.checksum = cpu_to_le16(csum);
  142. memcpy(buf, &header_v1, sizeof(header_v1));
  143. }
  144. }
  145. /*
  146. * Perform a rudimentary verification of header and return
  147. * size of image.
  148. */
  149. static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
  150. {
  151. struct socfpga_header_v0 header_v0;
  152. struct socfpga_header_v1 header_v1;
  153. uint16_t hdr_csum, sfp_csum;
  154. uint32_t img_len;
  155. /*
  156. * Header v0 is always smaller than Header v1 and the validation
  157. * word and version field is at the same place, so use Header v0
  158. * to check for version during verifiction and upgrade to Header
  159. * v1 if needed.
  160. */
  161. memcpy(&header_v0, buf, sizeof(header_v0));
  162. if (le32_to_cpu(header_v0.validation) != VALIDATION_WORD)
  163. return -1;
  164. if (header_v0.version == 0) {
  165. hdr_csum = le16_to_cpu(header_v0.checksum);
  166. sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
  167. img_len = le16_to_cpu(header_v0.length_u32) * 4;
  168. } else if (header_v0.version == 1) {
  169. memcpy(&header_v1, buf, sizeof(header_v1));
  170. hdr_csum = le16_to_cpu(header_v1.checksum);
  171. sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
  172. img_len = le32_to_cpu(header_v1.length_u8);
  173. } else { /* Invalid version */
  174. return -EINVAL;
  175. }
  176. /* Verify checksum */
  177. if (hdr_csum != sfp_csum)
  178. return -EINVAL;
  179. *ver = header_v0.version;
  180. return img_len;
  181. }
  182. /* Sign the buffer and return the signed buffer size */
  183. static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
  184. int len, int pad_64k,
  185. struct image_tool_params *params)
  186. {
  187. uint32_t calc_crc;
  188. /* Align the length up */
  189. len = ALIGN(len, 4);
  190. /* Build header, adding 4 bytes to length to hold the CRC32. */
  191. sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4, params);
  192. /* Calculate and apply the CRC */
  193. calc_crc = ~pbl_crc32(0, (char *)buf, len);
  194. *((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc);
  195. if (!pad_64k)
  196. return len + 4;
  197. return sfp_pad_size(ver);
  198. }
  199. /* Verify that the buffer looks sane */
  200. static int sfp_verify_buffer(const uint8_t *buf)
  201. {
  202. int len; /* Including 32bit CRC */
  203. uint32_t calc_crc;
  204. uint32_t buf_crc;
  205. uint8_t ver = 0;
  206. len = sfp_verify_header(buf + HEADER_OFFSET, &ver);
  207. if (len < 0) {
  208. debug("Invalid header\n");
  209. return -1;
  210. }
  211. if (len < HEADER_OFFSET || len > sfp_pad_size(ver)) {
  212. debug("Invalid header length (%i)\n", len);
  213. return -1;
  214. }
  215. /*
  216. * Adjust length to the base of the CRC.
  217. * Check the CRC.
  218. */
  219. len -= 4;
  220. calc_crc = ~pbl_crc32(0, (const char *)buf, len);
  221. buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
  222. if (buf_crc != calc_crc) {
  223. fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
  224. buf_crc, calc_crc);
  225. return -1;
  226. }
  227. return 0;
  228. }
  229. /* mkimage glue functions */
  230. static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
  231. struct image_tool_params *params)
  232. {
  233. if (image_size < 0x80)
  234. return -1;
  235. return sfp_verify_buffer(ptr);
  236. }
  237. static void socfpgaimage_print_header(const void *ptr)
  238. {
  239. if (sfp_verify_buffer(ptr) == 0)
  240. printf("Looks like a sane SOCFPGA preloader\n");
  241. else
  242. printf("Not a sane SOCFPGA preloader\n");
  243. }
  244. static int socfpgaimage_check_params_v0(struct image_tool_params *params)
  245. {
  246. /* Not sure if we should be accepting fflags */
  247. return (params->dflag && (params->fflag || params->lflag)) ||
  248. (params->fflag && (params->dflag || params->lflag)) ||
  249. (params->lflag && (params->dflag || params->fflag));
  250. }
  251. static int socfpgaimage_check_params_v1(struct image_tool_params *params)
  252. {
  253. /*
  254. * If the entry point is specified, ensure it is >= ENTRY_POINT_OFFSET
  255. * and it is 4 bytes aligned.
  256. */
  257. if (params->eflag && (params->ep < ENTRY_POINT_OFFSET ||
  258. params->ep % 4 != 0)) {
  259. fprintf(stderr,
  260. "Error: Entry point must be greater than 0x%x.\n",
  261. ENTRY_POINT_OFFSET);
  262. return -1;
  263. }
  264. /* Not sure if we should be accepting fflags */
  265. return (params->dflag && (params->fflag || params->lflag)) ||
  266. (params->fflag && (params->dflag || params->lflag)) ||
  267. (params->lflag && (params->dflag || params->fflag));
  268. }
  269. static int socfpgaimage_check_image_types_v0(uint8_t type)
  270. {
  271. if (type == IH_TYPE_SOCFPGAIMAGE)
  272. return EXIT_SUCCESS;
  273. return EXIT_FAILURE;
  274. }
  275. static int socfpgaimage_check_image_types_v1(uint8_t type)
  276. {
  277. if (type == IH_TYPE_SOCFPGAIMAGE_V1)
  278. return EXIT_SUCCESS;
  279. return EXIT_FAILURE;
  280. }
  281. /*
  282. * To work in with the mkimage framework, we do some ugly stuff...
  283. *
  284. * First, socfpgaimage_vrec_header() is called.
  285. * We prepend a fake header big enough to make the file sfp_pad_size().
  286. * This gives us enough space to do what we want later.
  287. *
  288. * Next, socfpgaimage_set_header() is called.
  289. * We fix up the buffer by moving the image to the start of the buffer.
  290. * We now have some room to do what we need (add CRC and padding).
  291. */
  292. static int data_size;
  293. static int sfp_fake_header_size(unsigned int size, uint8_t ver)
  294. {
  295. return sfp_pad_size(ver) - size;
  296. }
  297. static int sfp_vrec_header(struct image_tool_params *params,
  298. struct image_type_params *tparams, uint8_t ver)
  299. {
  300. struct stat sbuf;
  301. if (params->datafile &&
  302. stat(params->datafile, &sbuf) == 0 &&
  303. sbuf.st_size <= (sfp_pad_size(ver) - sizeof(uint32_t))) {
  304. data_size = sbuf.st_size;
  305. tparams->header_size = sfp_fake_header_size(data_size, ver);
  306. }
  307. return 0;
  308. }
  309. static int socfpgaimage_vrec_header_v0(struct image_tool_params *params,
  310. struct image_type_params *tparams)
  311. {
  312. return sfp_vrec_header(params, tparams, 0);
  313. }
  314. static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
  315. struct image_type_params *tparams)
  316. {
  317. return sfp_vrec_header(params, tparams, 1);
  318. }
  319. static void sfp_set_header(void *ptr, unsigned char ver,
  320. struct image_tool_params *params)
  321. {
  322. uint8_t *buf = (uint8_t *)ptr;
  323. /*
  324. * This function is called after vrec_header() has been called.
  325. * At this stage we have the sfp_fake_header_size() dummy bytes
  326. * followed by data_size image bytes. Total = sfp_pad_size().
  327. * We need to fix the buffer by moving the image bytes back to
  328. * the beginning of the buffer, then actually do the signing stuff...
  329. */
  330. memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
  331. memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
  332. sfp_sign_buffer(buf, ver, 0, data_size, 0, params);
  333. }
  334. static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
  335. struct image_tool_params *params)
  336. {
  337. sfp_set_header(ptr, 0, params);
  338. }
  339. static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
  340. struct image_tool_params *params)
  341. {
  342. sfp_set_header(ptr, 1, params);
  343. }
  344. U_BOOT_IMAGE_TYPE(
  345. socfpgaimage,
  346. "Altera SoCFPGA Cyclone V / Arria V image support",
  347. 0, /* This will be modified by vrec_header() */
  348. (void *)buffer_v0,
  349. socfpgaimage_check_params_v0,
  350. socfpgaimage_verify_header,
  351. socfpgaimage_print_header,
  352. socfpgaimage_set_header_v0,
  353. NULL,
  354. socfpgaimage_check_image_types_v0,
  355. NULL,
  356. socfpgaimage_vrec_header_v0
  357. );
  358. U_BOOT_IMAGE_TYPE(
  359. socfpgaimage_v1,
  360. "Altera SoCFPGA Arria10 image support",
  361. 0, /* This will be modified by vrec_header() */
  362. (void *)buffer_v1,
  363. socfpgaimage_check_params_v1,
  364. socfpgaimage_verify_header,
  365. socfpgaimage_print_header,
  366. socfpgaimage_set_header_v1,
  367. NULL,
  368. socfpgaimage_check_image_types_v1,
  369. NULL,
  370. socfpgaimage_vrec_header_v1
  371. );