i2c.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013 Google, Inc
  4. *
  5. * Note: Test coverage does not include 10-bit addressing
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <fdtdec.h>
  10. #include <i2c.h>
  11. #include <asm/state.h>
  12. #include <asm/test.h>
  13. #include <dm/device-internal.h>
  14. #include <dm/test.h>
  15. #include <dm/uclass-internal.h>
  16. #include <dm/util.h>
  17. #include <hexdump.h>
  18. #include <test/test.h>
  19. #include <test/ut.h>
  20. static const int busnum;
  21. static const int chip = 0x2c;
  22. /* Test that we can find buses and chips */
  23. static int dm_test_i2c_find(struct unit_test_state *uts)
  24. {
  25. struct udevice *bus, *dev;
  26. const int no_chip = 0x10;
  27. ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
  28. false, &bus));
  29. /*
  30. * The post_bind() method will bind devices to chip selects. Check
  31. * this then remove the emulation and the slave device.
  32. */
  33. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  34. ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
  35. ut_asserteq(-ENOENT, dm_i2c_probe(bus, no_chip, 0, &dev));
  36. ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
  37. return 0;
  38. }
  39. DM_TEST(dm_test_i2c_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  40. static int dm_test_i2c_read_write(struct unit_test_state *uts)
  41. {
  42. struct udevice *bus, *dev;
  43. uint8_t buf[5];
  44. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  45. ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  46. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  47. ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
  48. ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  49. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  50. ut_asserteq_mem(buf, "\0\0AB\0", sizeof(buf));
  51. return 0;
  52. }
  53. DM_TEST(dm_test_i2c_read_write, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  54. static int dm_test_i2c_speed(struct unit_test_state *uts)
  55. {
  56. struct udevice *bus, *dev;
  57. uint8_t buf[5];
  58. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  59. /* Use test mode so we create the required errors for invalid speeds */
  60. sandbox_i2c_set_test_mode(bus, true);
  61. ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  62. ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
  63. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  64. ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
  65. ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
  66. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  67. ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
  68. sandbox_i2c_set_test_mode(bus, false);
  69. return 0;
  70. }
  71. DM_TEST(dm_test_i2c_speed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  72. static int dm_test_i2c_offset_len(struct unit_test_state *uts)
  73. {
  74. struct udevice *bus, *dev;
  75. uint8_t buf[5];
  76. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  77. ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  78. ut_assertok(i2c_set_chip_offset_len(dev, 1));
  79. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  80. /* This is not supported by the uclass */
  81. ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
  82. return 0;
  83. }
  84. DM_TEST(dm_test_i2c_offset_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  85. static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
  86. {
  87. struct udevice *bus, *dev;
  88. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  89. /* Use test mode so that this chip address will always probe */
  90. sandbox_i2c_set_test_mode(bus, true);
  91. ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
  92. sandbox_i2c_set_test_mode(bus, false);
  93. return 0;
  94. }
  95. DM_TEST(dm_test_i2c_probe_empty, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  96. static int dm_test_i2c_bytewise(struct unit_test_state *uts)
  97. {
  98. struct udevice *bus, *dev;
  99. struct udevice *eeprom;
  100. uint8_t buf[5];
  101. ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  102. ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  103. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  104. ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
  105. /* Tell the EEPROM to only read/write one register at a time */
  106. ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
  107. ut_assertnonnull(eeprom);
  108. sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
  109. /* Now we only get the first byte - the rest will be 0xff */
  110. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  111. ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
  112. /* If we do a separate transaction for each byte, it works */
  113. ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
  114. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  115. ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
  116. /* This will only write A */
  117. ut_assertok(i2c_set_chip_flags(dev, 0));
  118. ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  119. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  120. ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
  121. /* Check that the B was ignored */
  122. ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
  123. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  124. ut_asserteq_mem(buf, "\0\0A\0\0\0", sizeof(buf));
  125. /* Now write it again with the new flags, it should work */
  126. ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
  127. ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  128. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  129. ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
  130. ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
  131. DM_I2C_CHIP_RD_ADDRESS));
  132. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  133. ut_asserteq_mem(buf, "\0\0AB\0\0", sizeof(buf));
  134. /* Restore defaults */
  135. sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
  136. ut_assertok(i2c_set_chip_flags(dev, 0));
  137. return 0;
  138. }
  139. DM_TEST(dm_test_i2c_bytewise, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  140. static int dm_test_i2c_offset(struct unit_test_state *uts)
  141. {
  142. struct udevice *eeprom;
  143. struct udevice *dev;
  144. uint8_t buf[5];
  145. ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
  146. /* Do a transfer so we can find the emulator */
  147. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  148. ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
  149. /* Offset length 0 */
  150. sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
  151. ut_assertok(i2c_set_chip_offset_len(dev, 0));
  152. ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
  153. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  154. ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
  155. ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  156. /* Offset length 1 */
  157. sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
  158. ut_assertok(i2c_set_chip_offset_len(dev, 1));
  159. ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  160. ut_asserteq(2, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  161. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  162. ut_asserteq_mem("ABAB\0", buf, sizeof(buf));
  163. ut_asserteq(0, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  164. /* Offset length 2 boundary - check model wrapping */
  165. sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
  166. ut_assertok(i2c_set_chip_offset_len(dev, 2));
  167. ut_assertok(dm_i2c_write(dev, 0xFF, (uint8_t *)"A", 1));
  168. ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  169. ut_assertok(dm_i2c_write(dev, 0x100, (uint8_t *)"B", 1));
  170. ut_asserteq(0x100, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  171. ut_assertok(dm_i2c_write(dev, 0x101, (uint8_t *)"C", 1));
  172. ut_asserteq(0x101, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  173. ut_assertok(dm_i2c_read(dev, 0xFF, buf, 5));
  174. ut_asserteq_mem("ABCAB", buf, sizeof(buf));
  175. ut_asserteq(0xFF, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  176. /* Offset length 2 */
  177. sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
  178. ut_assertok(i2c_set_chip_offset_len(dev, 2));
  179. ut_assertok(dm_i2c_write(dev, 0x2020, (uint8_t *)"AB", 2));
  180. ut_assertok(dm_i2c_read(dev, 0x2020, buf, 5));
  181. ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
  182. ut_asserteq(0x2020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  183. /* Offset length 3 */
  184. sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
  185. ut_assertok(i2c_set_chip_offset_len(dev, 3));
  186. ut_assertok(dm_i2c_write(dev, 0x303030, (uint8_t *)"AB", 2));
  187. ut_assertok(dm_i2c_read(dev, 0x303030, buf, 5));
  188. ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
  189. ut_asserteq(0x303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  190. /* Offset length 4 */
  191. sandbox_i2c_eeprom_set_offset_len(eeprom, 4);
  192. ut_assertok(i2c_set_chip_offset_len(dev, 4));
  193. ut_assertok(dm_i2c_write(dev, 0x40404040, (uint8_t *)"AB", 2));
  194. ut_assertok(dm_i2c_read(dev, 0x40404040, buf, 5));
  195. ut_asserteq_mem("AB\0\0\0", buf, sizeof(buf));
  196. ut_asserteq(0x40404040, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  197. /* Restore defaults */
  198. sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
  199. return 0;
  200. }
  201. DM_TEST(dm_test_i2c_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
  202. static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
  203. {
  204. struct udevice *eeprom;
  205. struct udevice *dev;
  206. u8 buf[5];
  207. ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
  208. /* Do a transfer so we can find the emulator */
  209. ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  210. ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
  211. /* Offset length 0 */
  212. sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
  213. sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
  214. ut_assertok(i2c_set_chip_offset_len(dev, 0));
  215. ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
  216. ut_assertok(dm_i2c_write(dev, 0x3, (uint8_t *)"AB", 2));
  217. ut_assertok(dm_i2c_read(dev, 0x3, buf, 5));
  218. ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
  219. ut_asserteq(0x3, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  220. ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
  221. /* Offset length 1 */
  222. sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
  223. sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
  224. ut_assertok(i2c_set_chip_offset_len(dev, 1));
  225. ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
  226. ut_assertok(dm_i2c_write(dev, 0x310, (uint8_t *)"AB", 2));
  227. ut_assertok(dm_i2c_read(dev, 0x310, buf, 5));
  228. ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
  229. ut_asserteq(0x310, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  230. ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
  231. /* Offset length 2 */
  232. sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
  233. sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
  234. ut_assertok(i2c_set_chip_offset_len(dev, 2));
  235. ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
  236. ut_assertok(dm_i2c_write(dev, 0x32020, (uint8_t *)"AB", 2));
  237. ut_assertok(dm_i2c_read(dev, 0x32020, buf, 5));
  238. ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
  239. ut_asserteq(0x32020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  240. ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
  241. /* Offset length 3 */
  242. sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
  243. sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
  244. ut_assertok(i2c_set_chip_offset_len(dev, 3));
  245. ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
  246. ut_assertok(dm_i2c_write(dev, 0x3303030, (uint8_t *)"AB", 2));
  247. ut_assertok(dm_i2c_read(dev, 0x3303030, buf, 5));
  248. ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
  249. ut_asserteq(0x3303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
  250. ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
  251. /* Restore defaults */
  252. sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
  253. sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0);
  254. return 0;
  255. }
  256. DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);