Makefile.build 14 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := tpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := spl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := .
  13. endif
  14. endif
  15. PHONY := __build
  16. __build:
  17. # Init all relevant variables used in kbuild files so
  18. # 1) they have correct type
  19. # 2) they do not inherit any value from the environment
  20. obj-y :=
  21. obj-m :=
  22. lib-y :=
  23. lib-m :=
  24. always :=
  25. targets :=
  26. subdir-y :=
  27. subdir-m :=
  28. EXTRA_AFLAGS :=
  29. EXTRA_CFLAGS :=
  30. EXTRA_CPPFLAGS :=
  31. EXTRA_LDFLAGS :=
  32. asflags-y :=
  33. ccflags-y :=
  34. cppflags-y :=
  35. ldflags-y :=
  36. subdir-asflags-y :=
  37. subdir-ccflags-y :=
  38. # Read auto.conf if it exists, otherwise ignore
  39. # Modified for U-Boot
  40. -include include/config/auto.conf
  41. -include $(prefix)/include/autoconf.mk
  42. include scripts/Makefile.uncmd_spl
  43. include scripts/Kbuild.include
  44. # For backward compatibility check that these variables do not change
  45. save-cflags := $(CFLAGS)
  46. # The filename Kbuild has precedence over Makefile
  47. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  48. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  49. include $(kbuild-file)
  50. # Added for U-Boot
  51. asflags-y += $(PLATFORM_CPPFLAGS)
  52. ccflags-y += $(PLATFORM_CPPFLAGS)
  53. cppflags-y += $(PLATFORM_CPPFLAGS)
  54. # If the save-* variables changed error out
  55. ifeq ($(KBUILD_NOPEDANTIC),)
  56. ifneq ("$(save-cflags)","$(CFLAGS)")
  57. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  58. endif
  59. endif
  60. include scripts/Makefile.lib
  61. # Do not include host rules unless needed
  62. ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
  63. include scripts/Makefile.host
  64. endif
  65. ifndef obj
  66. $(warning kbuild: Makefile.build is included improperly)
  67. endif
  68. # ===========================================================================
  69. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  70. lib-target := $(obj)/lib.a
  71. endif
  72. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  73. builtin-target := $(obj)/built-in.o
  74. endif
  75. modorder-target := $(obj)/modules.order
  76. # We keep a list of all modules in $(MODVERDIR)
  77. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  78. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  79. $(subdir-ym) $(always)
  80. @:
  81. # Linus' kernel sanity checking tool
  82. ifneq ($(KBUILD_CHECKSRC),0)
  83. ifeq ($(KBUILD_CHECKSRC),2)
  84. quiet_cmd_force_checksrc = CHECK $<
  85. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  86. else
  87. quiet_cmd_checksrc = CHECK $<
  88. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  89. endif
  90. endif
  91. # Do section mismatch analysis for each module/built-in.o
  92. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  93. cmd_secanalysis = ; scripts/mod/modpost $@
  94. endif
  95. # Compile C sources (.c)
  96. # ---------------------------------------------------------------------------
  97. # Default is built-in, unless we know otherwise
  98. modkern_cflags = \
  99. $(if $(part-of-module), \
  100. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  101. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  102. quiet_modtag := $(empty) $(empty)
  103. $(real-objs-m) : part-of-module := y
  104. $(real-objs-m:.o=.i) : part-of-module := y
  105. $(real-objs-m:.o=.s) : part-of-module := y
  106. $(real-objs-m:.o=.lst): part-of-module := y
  107. $(real-objs-m) : quiet_modtag := [M]
  108. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  109. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  110. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  111. $(obj-m) : quiet_modtag := [M]
  112. # Default for not multi-part modules
  113. modname = $(basetarget)
  114. $(multi-objs-m) : modname = $(modname-multi)
  115. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  116. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  117. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  118. $(multi-objs-y) : modname = $(modname-multi)
  119. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  120. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  121. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  122. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  123. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  124. $(obj)/%.s: $(src)/%.c FORCE
  125. $(call if_changed_dep,cc_s_c)
  126. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  127. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  128. $(obj)/%.i: $(src)/%.c FORCE
  129. $(call if_changed_dep,cc_i_c)
  130. cmd_gensymtypes = \
  131. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  132. $(GENKSYMS) $(if $(1), -T $(2)) \
  133. $(if $(KBUILD_PRESERVE),-p) \
  134. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  135. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  136. cmd_cc_symtypes_c = \
  137. set -e; \
  138. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  139. test -s $@ || rm -f $@
  140. $(obj)/%.symtypes : $(src)/%.c FORCE
  141. $(call cmd,cc_symtypes_c)
  142. # C (.c) files
  143. # The C file is compiled and updated dependency information is generated.
  144. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  145. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  146. ifndef CONFIG_MODVERSIONS
  147. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  148. else
  149. # When module versioning is enabled the following steps are executed:
  150. # o compile a .tmp_<file>.o from <file>.c
  151. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  152. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  153. # are done.
  154. # o otherwise, we calculate symbol versions using the good old
  155. # genksyms on the preprocessed source and postprocess them in a way
  156. # that they are usable as a linker script
  157. # o generate <file>.o from .tmp_<file>.o using the linker to
  158. # replace the unresolved symbols __crc_exported_symbol with
  159. # the actual value of the checksum generated by genksyms
  160. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  161. cmd_modversions = \
  162. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  163. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  164. > $(@D)/.tmp_$(@F:.o=.ver); \
  165. \
  166. $(LD) $(KBUILD_LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  167. -T $(@D)/.tmp_$(@F:.o=.ver); \
  168. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  169. else \
  170. mv -f $(@D)/.tmp_$(@F) $@; \
  171. fi;
  172. endif
  173. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  174. # gcc 5 supports generating the mcount tables directly
  175. ifneq ($(call cc-option,-mrecord-mcount,y),y)
  176. KBUILD_CFLAGS += -mrecord-mcount
  177. else
  178. # else do it all manually
  179. ifdef BUILD_C_RECORDMCOUNT
  180. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  181. RECORDMCOUNT_FLAGS = -w
  182. endif
  183. # Due to recursion, we must skip empty.o.
  184. # The empty.o file is created in the make process in order to determine
  185. # the target endianness and word size. It is made before all other C
  186. # files, including recordmcount.
  187. sub_cmd_record_mcount = \
  188. if [ $(@) != "scripts/mod/empty.o" ]; then \
  189. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  190. fi;
  191. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  192. $(srctree)/scripts/recordmcount.h
  193. else
  194. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  195. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  196. "$(if $(CONFIG_64BIT),64,32)" \
  197. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
  198. "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
  199. "$(if $(part-of-module),1,0)" "$(@)";
  200. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  201. endif
  202. cmd_record_mcount = \
  203. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  204. "$(CC_FLAGS_FTRACE)" ]; then \
  205. $(sub_cmd_record_mcount) \
  206. fi;
  207. endif # -record-mcount
  208. endif
  209. define rule_cc_o_c
  210. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  211. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  212. $(cmd_modversions) \
  213. $(call echo-cmd,record_mcount) \
  214. $(cmd_record_mcount) \
  215. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  216. $(dot-target).tmp; \
  217. rm -f $(depfile); \
  218. mv -f $(dot-target).tmp $(dot-target).cmd
  219. endef
  220. # Built-in and composite module parts
  221. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  222. $(call cmd,force_checksrc)
  223. $(call if_changed_rule,cc_o_c)
  224. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  225. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  226. $(call cmd,force_checksrc)
  227. $(call if_changed_rule,cc_o_c)
  228. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  229. quiet_cmd_cc_lst_c = MKLST $@
  230. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  231. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  232. System.map $(OBJDUMP) > $@
  233. $(obj)/%.lst: $(src)/%.c FORCE
  234. $(call if_changed_dep,cc_lst_c)
  235. # Compile assembler sources (.S)
  236. # ---------------------------------------------------------------------------
  237. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  238. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  239. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  240. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  241. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  242. $(obj)/%.s: $(src)/%.S FORCE
  243. $(call if_changed_dep,as_s_S)
  244. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  245. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  246. $(obj)/%.o: $(src)/%.S FORCE
  247. $(call if_changed_dep,as_o_S)
  248. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  249. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  250. # Linker scripts preprocessor (.lds.S -> .lds)
  251. # ---------------------------------------------------------------------------
  252. quiet_cmd_cpp_lds_S = LDS $@
  253. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  254. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  255. $(obj)/%.lds: $(src)/%.lds.S FORCE
  256. $(call if_changed_dep,cpp_lds_S)
  257. # ASN.1 grammar
  258. # ---------------------------------------------------------------------------
  259. quiet_cmd_asn1_compiler = ASN.1 $@
  260. cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
  261. $(subst .h,.c,$@) $(subst .c,.h,$@)
  262. $(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
  263. $(call cmd,asn1_compiler)
  264. # Build the compiled-in targets
  265. # ---------------------------------------------------------------------------
  266. # To build objects in subdirs, we need to descend into the directories
  267. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  268. #
  269. # Rule to compile a set of .o files into one .o file
  270. #
  271. ifdef builtin-target
  272. quiet_cmd_link_o_target = LD $@
  273. # If the list of objects to link is empty, just create an empty built-in.o
  274. cmd_link_o_target = $(if $(strip $(obj-y)),\
  275. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  276. $(cmd_secanalysis),\
  277. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  278. $(builtin-target): $(obj-y) FORCE
  279. $(call if_changed,link_o_target)
  280. targets += $(builtin-target)
  281. endif # builtin-target
  282. #
  283. # Rule to create modules.order file
  284. #
  285. # Create commands to either record .ko file or cat modules.order from
  286. # a subdirectory
  287. modorder-cmds = \
  288. $(foreach m, $(modorder), \
  289. $(if $(filter %/modules.order, $m), \
  290. cat $m;, echo kernel/$m;))
  291. $(modorder-target): $(subdir-ym) FORCE
  292. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  293. #
  294. # Rule to compile a set of .o files into one .a file
  295. #
  296. ifdef lib-target
  297. quiet_cmd_link_l_target = AR $@
  298. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  299. $(lib-target): $(lib-y) FORCE
  300. $(call if_changed,link_l_target)
  301. targets += $(lib-target)
  302. endif
  303. #
  304. # Rule to link composite objects
  305. #
  306. # Composite objects are specified in kbuild makefile as follows:
  307. # <composite-object>-objs := <list of .o files>
  308. # or
  309. # <composite-object>-y := <list of .o files>
  310. link_multi_deps = \
  311. $(filter $(addprefix $(obj)/, \
  312. $($(subst $(obj)/,,$(@:.o=-objs))) \
  313. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  314. quiet_cmd_link_multi-y = LD $@
  315. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  316. quiet_cmd_link_multi-m = LD [M] $@
  317. cmd_link_multi-m = $(cmd_link_multi-y)
  318. $(multi-used-y): FORCE
  319. $(call if_changed,link_multi-y)
  320. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  321. $(multi-used-m): FORCE
  322. $(call if_changed,link_multi-m)
  323. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  324. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  325. targets += $(multi-used-y) $(multi-used-m)
  326. # Add intermediate targets:
  327. # When building objects with specific suffix patterns, add intermediate
  328. # targets that the final targets are derived from.
  329. intermediate_targets = $(foreach sfx, $(2), \
  330. $(patsubst %$(strip $(1)),%$(sfx), \
  331. $(filter %$(strip $(1)), $(targets))))
  332. # %.lex.o <- %.lex.c <- %.l
  333. # %.tab.o <- %.tab.[ch] <- %.y
  334. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  335. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  336. # Descending
  337. # ---------------------------------------------------------------------------
  338. PHONY += $(subdir-ym)
  339. $(subdir-ym):
  340. $(Q)$(MAKE) $(build)=$@
  341. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  342. # ---------------------------------------------------------------------------
  343. PHONY += FORCE
  344. FORCE:
  345. # Read all saved command lines and dependencies for the $(targets) we
  346. # may be building above, using $(if_changed{,_dep}). As an
  347. # optimization, we don't need to read them if the target does not
  348. # exist, we will rebuild anyway in that case.
  349. cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
  350. ifneq ($(cmd_files),)
  351. include $(cmd_files)
  352. endif
  353. # Create directories for object files if they do not exist
  354. obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
  355. $(shell mkdir -p $(obj-dirs))
  356. .PHONY: $(PHONY)