fusbh200.h 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Faraday USB 2.0 EHCI Controller
  4. *
  5. * (C) Copyright 2010 Faraday Technology
  6. * Dante Su <dantesu@faraday-tech.com>
  7. */
  8. #ifndef _FUSBH200_H
  9. #define _FUSBH200_H
  10. struct fusbh200_regs {
  11. struct {
  12. uint32_t data[4];
  13. } hccr; /* 0x00 - 0x0f: hccr */
  14. struct {
  15. uint32_t data[9];
  16. } hcor; /* 0x10 - 0x33: hcor */
  17. uint32_t easstr;/* 0x34: EOF&Async. Sched. Sleep Timer Register */
  18. uint32_t rsvd[2];
  19. uint32_t bmcsr; /* 0x40: Bus Monitor Control Status Register */
  20. uint32_t bmisr; /* 0x44: Bus Monitor Interrupt Status Register */
  21. uint32_t bmier; /* 0x48: Bus Monitor Interrupt Enable Register */
  22. };
  23. /* EOF & Async. Schedule Sleep Timer Register */
  24. #define EASSTR_RUNNING (1 << 6) /* Put transceiver in running/resume mode */
  25. #define EASSTR_SUSPEND (0 << 6) /* Put transceiver in suspend mode */
  26. #define EASSTR_EOF2(x) (((x) & 0x3) << 4) /* EOF 2 Timing */
  27. #define EASSTR_EOF1(x) (((x) & 0x3) << 2) /* EOF 1 Timing */
  28. #define EASSTR_ASST(x) (((x) & 0x3) << 0) /* Async. Sched. Sleep Timer */
  29. /* Bus Monitor Control Status Register */
  30. #define BMCSR_SPD_HIGH (2 << 9) /* Speed of the attached device */
  31. #define BMCSR_SPD_LOW (1 << 9)
  32. #define BMCSR_SPD_FULL (0 << 9)
  33. #define BMCSR_SPD_MASK (3 << 9)
  34. #define BMCSR_SPD_SHIFT 9
  35. #define BMCSR_SPD(x) ((x >> 9) & 0x03)
  36. #define BMCSR_VBUS (1 << 8) /* VBUS Valid */
  37. #define BMCSR_VBUS_OFF (1 << 4) /* VBUS Off */
  38. #define BMCSR_VBUS_ON (0 << 4) /* VBUS On */
  39. #define BMCSR_IRQLH (1 << 3) /* IRQ triggered at level-high */
  40. #define BMCSR_IRQLL (0 << 3) /* IRQ triggered at level-low */
  41. #define BMCSR_HALFSPD (1 << 2) /* Half speed mode for FPGA test */
  42. #define BMCSR_HFT_LONG (1 << 1) /* HDISCON noise filter = 270 us*/
  43. #define BMCSR_HFT (0 << 1) /* HDISCON noise filter = 135 us*/
  44. #define BMCSR_VFT_LONG (1 << 1) /* VBUS noise filter = 472 us*/
  45. #define BMCSR_VFT (0 << 1) /* VBUS noise filter = 135 us*/
  46. /* Bus Monitor Interrupt Status Register */
  47. /* Bus Monitor Interrupt Enable Register */
  48. #define BMISR_DMAERR (1 << 4) /* DMA error */
  49. #define BMISR_DMA (1 << 3) /* DMA complete */
  50. #define BMISR_DEVRM (1 << 2) /* device removed */
  51. #define BMISR_OVD (1 << 1) /* over-current detected */
  52. #define BMISR_VBUSERR (1 << 0) /* VBUS error */
  53. #endif