spartan3.h 4.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2002
  4. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  5. */
  6. #ifndef _SPARTAN3_H_
  7. #define _SPARTAN3_H_
  8. #include <xilinx.h>
  9. /* Slave Parallel Implementation function table */
  10. typedef struct {
  11. xilinx_pre_fn pre;
  12. xilinx_pgm_fn pgm;
  13. xilinx_init_fn init;
  14. xilinx_err_fn err;
  15. xilinx_done_fn done;
  16. xilinx_clk_fn clk;
  17. xilinx_cs_fn cs;
  18. xilinx_wr_fn wr;
  19. xilinx_rdata_fn rdata;
  20. xilinx_wdata_fn wdata;
  21. xilinx_busy_fn busy;
  22. xilinx_abort_fn abort;
  23. xilinx_post_fn post;
  24. } xilinx_spartan3_slave_parallel_fns;
  25. /* Slave Serial Implementation function table */
  26. typedef struct {
  27. xilinx_pre_fn pre;
  28. xilinx_pgm_fn pgm;
  29. xilinx_clk_fn clk;
  30. xilinx_init_fn init;
  31. xilinx_done_fn done;
  32. xilinx_wr_fn wr;
  33. xilinx_post_fn post;
  34. xilinx_bwr_fn bwr; /* block write function */
  35. xilinx_abort_fn abort;
  36. } xilinx_spartan3_slave_serial_fns;
  37. #if defined(CONFIG_FPGA_SPARTAN3)
  38. extern struct xilinx_fpga_op spartan3_op;
  39. # define FPGA_SPARTAN3_OPS &spartan3_op
  40. #else
  41. # define FPGA_SPARTAN3_OPS NULL
  42. #endif
  43. /* Device Image Sizes
  44. *********************************************************************/
  45. /* Spartan-III (1.2V) */
  46. #define XILINX_XC3S50_SIZE 439264/8
  47. #define XILINX_XC3S200_SIZE 1047616/8
  48. #define XILINX_XC3S400_SIZE 1699136/8
  49. #define XILINX_XC3S1000_SIZE 3223488/8
  50. #define XILINX_XC3S1500_SIZE 5214784/8
  51. #define XILINX_XC3S2000_SIZE 7673024/8
  52. #define XILINX_XC3S4000_SIZE 11316864/8
  53. #define XILINX_XC3S5000_SIZE 13271936/8
  54. /* Spartan-3E (v3.4) */
  55. #define XILINX_XC3S100E_SIZE 581344/8
  56. #define XILINX_XC3S250E_SIZE 1353728/8
  57. #define XILINX_XC3S500E_SIZE 2270208/8
  58. #define XILINX_XC3S1200E_SIZE 3841184/8
  59. #define XILINX_XC3S1600E_SIZE 5969696/8
  60. /*
  61. * Spartan-6 : the Spartan-6 family can be programmed
  62. * exactly as the Spartan-3
  63. */
  64. #define XILINK_XC6SLX4_SIZE (3713568/8)
  65. /* Descriptor Macros
  66. *********************************************************************/
  67. /* Spartan-III devices */
  68. #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
  69. { xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, \
  70. FPGA_SPARTAN3_OPS }
  71. #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
  72. { xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, \
  73. FPGA_SPARTAN3_OPS }
  74. #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
  75. { xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, \
  76. FPGA_SPARTAN3_OPS }
  77. #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
  78. { xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, \
  79. FPGA_SPARTAN3_OPS }
  80. #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
  81. { xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, \
  82. FPGA_SPARTAN3_OPS }
  83. #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
  84. { xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, \
  85. FPGA_SPARTAN3_OPS }
  86. #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
  87. { xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, \
  88. FPGA_SPARTAN3_OPS }
  89. #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
  90. { xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, \
  91. FPGA_SPARTAN3_OPS }
  92. /* Spartan-3E devices */
  93. #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
  94. { xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, \
  95. FPGA_SPARTAN3_OPS }
  96. #define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
  97. { xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, \
  98. FPGA_SPARTAN3_OPS }
  99. #define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
  100. { xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, \
  101. FPGA_SPARTAN3_OPS }
  102. #define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
  103. { xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \
  104. FPGA_SPARTAN3_OPS }
  105. #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
  106. { xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \
  107. FPGA_SPARTAN3_OPS }
  108. #define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
  109. { xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, \
  110. FPGA_SPARTAN3_OPS }
  111. #endif /* _SPARTAN3_H_ */