pmic.h 9.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2014-2015 Samsung Electronics
  4. * Przemyslaw Marczak <p.marczak@samsung.com>
  5. *
  6. * Copyright (C) 2011-2012 Samsung Electronics
  7. * Lukasz Majewski <l.majewski@samsung.com>
  8. */
  9. #ifndef __CORE_PMIC_H_
  10. #define __CORE_PMIC_H_
  11. #include <dm/ofnode.h>
  12. #include <i2c.h>
  13. #include <linux/list.h>
  14. #include <power/power_chrg.h>
  15. enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
  16. #ifdef CONFIG_POWER
  17. enum { I2C_PMIC, I2C_NUM, };
  18. enum { PMIC_READ, PMIC_WRITE, };
  19. enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
  20. enum {
  21. PMIC_CHARGER_DISABLE,
  22. PMIC_CHARGER_ENABLE,
  23. };
  24. struct p_i2c {
  25. unsigned char addr;
  26. unsigned char *buf;
  27. unsigned char tx_num;
  28. };
  29. struct p_spi {
  30. unsigned int cs;
  31. unsigned int mode;
  32. unsigned int bitlen;
  33. unsigned int clk;
  34. unsigned int flags;
  35. u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
  36. };
  37. struct pmic;
  38. struct power_fg {
  39. int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
  40. int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
  41. };
  42. struct power_chrg {
  43. int (*chrg_type) (struct pmic *p);
  44. int (*chrg_bat_present) (struct pmic *p);
  45. int (*chrg_state) (struct pmic *p, int state, int current);
  46. };
  47. struct power_battery {
  48. struct battery *bat;
  49. int (*battery_init) (struct pmic *bat, struct pmic *p1,
  50. struct pmic *p2, struct pmic *p3);
  51. int (*battery_charge) (struct pmic *bat);
  52. /* Keep info about power devices involved with battery operation */
  53. struct pmic *chrg, *fg, *muic;
  54. };
  55. struct pmic {
  56. const char *name;
  57. unsigned char bus;
  58. unsigned char interface;
  59. unsigned char sensor_byte_order;
  60. unsigned int number_of_regs;
  61. union hw {
  62. struct p_i2c i2c;
  63. struct p_spi spi;
  64. } hw;
  65. void (*low_power_mode) (void);
  66. struct power_battery *pbat;
  67. struct power_chrg *chrg;
  68. struct power_fg *fg;
  69. struct pmic *parent;
  70. struct list_head list;
  71. };
  72. #endif /* CONFIG_POWER */
  73. #ifdef CONFIG_DM_PMIC
  74. /**
  75. * U-Boot PMIC Framework
  76. * =====================
  77. *
  78. * UCLASS_PMIC - This is designed to provide an I/O interface for PMIC devices.
  79. *
  80. * For the multi-function PMIC devices, this can be used as parent I/O device
  81. * for each IC's interface. Then, each child uses its parent for read/write.
  82. *
  83. * The driver model tree could look like this:
  84. *
  85. *_ root device
  86. * |_ BUS 0 device (e.g. I2C0) - UCLASS_I2C/SPI/...
  87. * | |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
  88. * | |_ REGULATOR device (ldo/buck/... ops) - UCLASS_REGULATOR
  89. * | |_ CHARGER device (charger ops) - UCLASS_CHARGER (in the future)
  90. * | |_ MUIC device (microUSB connector ops) - UCLASS_MUIC (in the future)
  91. * | |_ ...
  92. * |
  93. * |_ BUS 1 device (e.g. I2C1) - UCLASS_I2C/SPI/...
  94. * |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
  95. * |_ RTC device (rtc ops) - UCLASS_RTC (in the future)
  96. *
  97. * We can find two PMIC cases in boards design:
  98. * - single I/O interface
  99. * - multiple I/O interfaces
  100. * We bind a single PMIC device for each interface, to provide an I/O for
  101. * its child devices. And each child usually implements a different function,
  102. * controlled by the same interface.
  103. *
  104. * The binding should be done automatically. If device tree nodes/subnodes are
  105. * proper defined, then:
  106. *
  107. * |_ the ROOT driver will bind the device for I2C/SPI node:
  108. * |_ the I2C/SPI driver should bind a device for pmic node:
  109. * |_ the PMIC driver should bind devices for its childs:
  110. * |_ regulator (child)
  111. * |_ charger (child)
  112. * |_ other (child)
  113. *
  114. * The same for other device nodes, for multi-interface PMIC.
  115. *
  116. * Note:
  117. * Each PMIC interface driver should use a different compatible string.
  118. *
  119. * If a PMIC child device driver needs access the PMIC-specific registers,
  120. * it need know only the register address and the access can be done through
  121. * the parent pmic driver. Like in the example:
  122. *
  123. *_ root driver
  124. * |_ dev: bus I2C0 - UCLASS_I2C
  125. * | |_ dev: my_pmic (read/write) (is parent) - UCLASS_PMIC
  126. * | |_ dev: my_regulator (set value/etc..) (is child) - UCLASS_REGULATOR
  127. *
  128. * To ensure such device relationship, the pmic device driver should also bind
  129. * all its child devices, like in the example below. It can be done by calling
  130. * the 'pmic_bind_children()' - please refer to the function description, which
  131. * can be found in this header file. This function, should be called inside the
  132. * driver's bind() method.
  133. *
  134. * For the example driver, please refer the MAX77686 driver:
  135. * - 'drivers/power/pmic/max77686.c'
  136. */
  137. /**
  138. * struct dm_pmic_ops - PMIC device I/O interface
  139. *
  140. * Should be implemented by UCLASS_PMIC device drivers. The standard
  141. * device operations provides the I/O interface for it's childs.
  142. *
  143. * @reg_count: device's register count
  144. * @read: read 'len' bytes at "reg" and store it into the 'buffer'
  145. * @write: write 'len' bytes from the 'buffer' to the register at 'reg' address
  146. */
  147. struct dm_pmic_ops {
  148. int (*reg_count)(struct udevice *dev);
  149. int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
  150. int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
  151. int len);
  152. };
  153. /**
  154. * enum pmic_op_type - used for various pmic devices operation calls,
  155. * for reduce a number of lines with the same code for read/write or get/set.
  156. *
  157. * @PMIC_OP_GET - get operation
  158. * @PMIC_OP_SET - set operation
  159. */
  160. enum pmic_op_type {
  161. PMIC_OP_GET,
  162. PMIC_OP_SET,
  163. };
  164. /**
  165. * struct pmic_child_info - basic device's child info for bind child nodes with
  166. * the driver by the node name prefix and driver name. This is a helper struct
  167. * for function: pmic_bind_children().
  168. *
  169. * @prefix - child node name prefix (or its name if is unique or single)
  170. * @driver - driver name for the sub-node with prefix
  171. */
  172. struct pmic_child_info {
  173. const char *prefix;
  174. const char *driver;
  175. };
  176. /* drivers/power/pmic-uclass.c */
  177. /**
  178. * pmic_bind_children() - bind drivers for given parent pmic, using child info
  179. * found in 'child_info' array.
  180. *
  181. * @pmic - pmic device - the parent of found child's
  182. * @child_info - N-childs info array
  183. * @return a positive number of childs, or 0 if no child found (error)
  184. *
  185. * Note: For N-childs the child_info array should have N+1 entries and the last
  186. * entry prefix should be NULL - the same as for drivers compatible.
  187. *
  188. * For example, a single prefix info (N=1):
  189. * static const struct pmic_child_info bind_info[] = {
  190. * { .prefix = "ldo", .driver = "ldo_driver" },
  191. * { },
  192. * };
  193. *
  194. * This function is useful for regulator sub-nodes:
  195. * my_regulator@0xa {
  196. * reg = <0xa>;
  197. * (pmic - bind automatically by compatible)
  198. * compatible = "my_pmic";
  199. * ...
  200. * (pmic's childs - bind by pmic_bind_children())
  201. * (nodes prefix: "ldo", driver: "my_regulator_ldo")
  202. * ldo1 { ... };
  203. * ldo2 { ... };
  204. *
  205. * (nodes prefix: "buck", driver: "my_regulator_buck")
  206. * buck1 { ... };
  207. * buck2 { ... };
  208. * };
  209. */
  210. int pmic_bind_children(struct udevice *pmic, ofnode parent,
  211. const struct pmic_child_info *child_info);
  212. /**
  213. * pmic_get: get the pmic device using its name
  214. *
  215. * @name - device name
  216. * @devp - returned pointer to the pmic device
  217. * @return 0 on success or negative value of errno.
  218. *
  219. * The returned devp device can be used with pmic_read/write calls
  220. */
  221. int pmic_get(const char *name, struct udevice **devp);
  222. /**
  223. * pmic_reg_count: get the pmic register count
  224. *
  225. * The required pmic device can be obtained by 'pmic_get()'
  226. *
  227. * @dev - pointer to the UCLASS_PMIC device
  228. * @return register count value on success or negative value of errno.
  229. */
  230. int pmic_reg_count(struct udevice *dev);
  231. /**
  232. * pmic_read/write: read/write to the UCLASS_PMIC device
  233. *
  234. * The required pmic device can be obtained by 'pmic_get()'
  235. *
  236. * @pmic - pointer to the UCLASS_PMIC device
  237. * @reg - device register offset
  238. * @buffer - pointer to read/write buffer
  239. * @len - byte count for read/write
  240. * @return 0 on success or negative value of errno.
  241. */
  242. int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
  243. int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len);
  244. /**
  245. * pmic_reg_read() - read a PMIC register value
  246. *
  247. * @dev: PMIC device to read
  248. * @reg: Register to read
  249. * @return value read on success or negative value of errno.
  250. */
  251. int pmic_reg_read(struct udevice *dev, uint reg);
  252. /**
  253. * pmic_reg_write() - write a PMIC register value
  254. *
  255. * @dev: PMIC device to write
  256. * @reg: Register to write
  257. * @value: Value to write
  258. * @return 0 on success or negative value of errno.
  259. */
  260. int pmic_reg_write(struct udevice *dev, uint reg, uint value);
  261. /**
  262. * pmic_clrsetbits() - clear and set bits in a PMIC register
  263. *
  264. * This reads a register, optionally clears some bits, optionally sets some
  265. * bits, then writes the register.
  266. *
  267. * @dev: PMIC device to update
  268. * @reg: Register to update
  269. * @clr: Bit mask to clear (set those bits that you want cleared)
  270. * @set: Bit mask to set (set those bits that you want set)
  271. * @return 0 on success or negative value of errno.
  272. */
  273. int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
  274. /*
  275. * This structure holds the private data for PMIC uclass
  276. * For now we store information about the number of bytes
  277. * being sent at once to the device.
  278. */
  279. struct uc_pmic_priv {
  280. uint trans_len;
  281. };
  282. #endif /* CONFIG_DM_PMIC */
  283. #ifdef CONFIG_POWER
  284. int pmic_init(unsigned char bus);
  285. int power_init_board(void);
  286. int pmic_dialog_init(unsigned char bus);
  287. int check_reg(struct pmic *p, u32 reg);
  288. struct pmic *pmic_alloc(void);
  289. struct pmic *pmic_get(const char *s);
  290. int pmic_probe(struct pmic *p);
  291. int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
  292. int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
  293. int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
  294. #endif
  295. #define pmic_i2c_addr (p->hw.i2c.addr)
  296. #define pmic_i2c_tx_num (p->hw.i2c.tx_num)
  297. #define pmic_spi_bitlen (p->hw.spi.bitlen)
  298. #define pmic_spi_flags (p->hw.spi.flags)
  299. #endif /* __CORE_PMIC_H_ */