max77696_pmic.h 808 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  4. * Fabio Estevam <fabio.estevam@freescale.com>
  5. */
  6. #ifndef __MAX77696_PMIC_H__
  7. #define __MAX77696_PMIC_H__
  8. #define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C
  9. enum {
  10. L01_CNFG1 = 0x43,
  11. L01_CNFG2,
  12. L02_CNFG1,
  13. L02_CNFG2,
  14. L03_CNFG1,
  15. L03_CNFG2,
  16. L04_CNFG1,
  17. L04_CNFG2,
  18. L05_CNFG1,
  19. L05_CNFG2,
  20. L06_CNFG1,
  21. L06_CNFG2,
  22. L07_CNFG1,
  23. L07_CNFG2,
  24. L08_CNFG1,
  25. L08_CNFG2,
  26. L09_CNFG1,
  27. L09_CNFG2,
  28. L10_CNFG1,
  29. L10_CNFG2,
  30. LDO_INT1,
  31. LDO_INT2,
  32. LDO_INT1M,
  33. LDO_INT2M,
  34. LDO_CNFG3,
  35. SW1_CNTRL,
  36. SW2_CNTRL,
  37. SW3_CNTRL,
  38. SW4_CNTRL,
  39. EPDCNFG,
  40. EPDINTS,
  41. EPDINT,
  42. EPDINTM,
  43. EPDVCOM,
  44. EPDVEE,
  45. EPDVNEG,
  46. EPDVPOS,
  47. EPDVDDH,
  48. EPDSEQ,
  49. EPDOKINTS,
  50. CID = 0x9c,
  51. PMIC_NUM_OF_REGS,
  52. };
  53. int power_max77696_init(unsigned char bus);
  54. #endif