acpi_pmc.h 4.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright 2019 Google LLC
  4. */
  5. #ifndef __ACPI_PMC_H
  6. #define __ACPI_PMC_H
  7. #ifndef __ASSEMBLY__
  8. enum {
  9. GPE0_REG_MAX = 4,
  10. };
  11. enum {
  12. PM1_STS = 0x00,
  13. PM1_EN = 0x02,
  14. PM1_CNT = 0x04,
  15. PM1_TMR = 0x08,
  16. GPE0_STS = 0x20,
  17. GPE0_EN = 0x30,
  18. };
  19. /**
  20. * struct acpi_pmc_upriv - holds common data for the x86 PMC
  21. *
  22. * @pmc_bar0: Base address 0 of PMC
  23. * @pmc_bar1: Base address 2 of PMC
  24. * @acpi_base: Base address of ACPI block
  25. * @pm1_sts: PM1 status
  26. * @pm1_en: PM1 enable
  27. * @pm1_cnt: PM1 control
  28. * @gpe_cfg: Address of GPE_CFG register
  29. * @gpe0_dwx_mask: Mask to use for each GPE0 (typically 7 or 0xf)
  30. * @gpe0_dwx_shift_base: Base shift value to use for GPE0 (0 or 4)
  31. * @gpe0_sts_req: GPE0 status register offset
  32. * @gpe0_en_req: GPE0 enable register offset
  33. * @gpe0_sts: GPE0 status values
  34. * @gpe0_en: GPE0 enable values
  35. * @gpe0_dw: GPE0 DW values
  36. * @gpe0_count: Number of GPE0 registers
  37. * @tco1_sts: TCO1 status
  38. * @tco2_sts: TCO2 status
  39. * @prsts: Power and reset status
  40. * @gen_pmcon1: General power mgmt configuration 1
  41. * @gen_pmcon2: General power mgmt configuration 2
  42. * @gen_pmcon3: General power mgmt configuration 3
  43. */
  44. struct acpi_pmc_upriv {
  45. void *pmc_bar0;
  46. void *pmc_bar2;
  47. u32 acpi_base;
  48. u16 pm1_sts;
  49. u16 pm1_en;
  50. u32 pm1_cnt;
  51. u32 *gpe_cfg;
  52. u32 gpe0_dwx_mask;
  53. u32 gpe0_dwx_shift_base;
  54. u32 gpe0_sts_reg;
  55. u32 gpe0_en_reg;
  56. u32 gpe0_sts[GPE0_REG_MAX];
  57. u32 gpe0_en[GPE0_REG_MAX];
  58. u32 gpe0_dw[GPE0_REG_MAX];
  59. int gpe0_count;
  60. u16 tco1_sts;
  61. u16 tco2_sts;
  62. u32 prsts;
  63. u32 gen_pmcon1;
  64. u32 gen_pmcon2;
  65. u32 gen_pmcon3;
  66. };
  67. struct acpi_pmc_ops {
  68. /**
  69. * init() - Set up the PMC for use
  70. *
  71. * This reads the current state of the PMC. Most of the state is read
  72. * automatically by the uclass since it is common.
  73. *
  74. * This is optional.
  75. *
  76. * @dev: PMC device to use
  77. * @return 0 if OK, -ve on error
  78. */
  79. int (*init)(struct udevice *dev);
  80. /**
  81. * prev_sleep_state() - Get the previous sleep state (optional)
  82. *
  83. * This reads various state registers and returns the sleep state from
  84. * which the system woke. If this method is not provided, the uclass
  85. * will return a calculated value.
  86. *
  87. * This is optional.
  88. *
  89. * @dev: PMC device to use
  90. * @prev_sleep_state: Previous sleep state as calculated by the uclass.
  91. * The method can use this as the return value or calculate its
  92. * own.
  93. *
  94. * @return enum acpi_sleep_state indicating the previous sleep state
  95. * (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
  96. */
  97. int (*prev_sleep_state)(struct udevice *dev, int prev_sleep_state);
  98. /**
  99. * disable_tco() - Disable the timer/counter
  100. *
  101. * Disables the timer/counter in the PMC
  102. *
  103. * This is optional.
  104. *
  105. * @dev: PMC device to use
  106. * @return 0
  107. */
  108. int (*disable_tco)(struct udevice *dev);
  109. /**
  110. * global_reset_set_enable() - Enable/Disable global reset
  111. *
  112. * Enable or disable global reset. If global reset is enabled, both hard
  113. * reset and soft reset will trigger global reset, where both host and
  114. * TXE are reset. This is cleared on cold boot, hard reset, soft reset
  115. * and Sx.
  116. *
  117. * This is optional.
  118. *
  119. * @dev: PMC device to use
  120. * @enable: true to enable global reset, false to disable
  121. * @return 0
  122. */
  123. int (*global_reset_set_enable)(struct udevice *dev, bool enable);
  124. };
  125. #define acpi_pmc_get_ops(dev) ((struct acpi_pmc_ops *)(dev)->driver->ops)
  126. /**
  127. * init() - Set up the PMC for use
  128. *
  129. * This reads the current state of the PMC. This reads in the common registers,
  130. * then calls the device's init() method to read the SoC-specific registers.
  131. *
  132. * @return 0 if OK, -ve on error
  133. */
  134. int pmc_init(struct udevice *dev);
  135. /**
  136. * pmc_prev_sleep_state() - Get the previous sleep state
  137. *
  138. * This reads various state registers and returns the sleep state from
  139. * which the system woke.
  140. *
  141. * @return enum acpi_sleep_state indicating the previous sleep state
  142. * (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
  143. */
  144. int pmc_prev_sleep_state(struct udevice *dev);
  145. /**
  146. * pmc_disable_tco() - Disable the timer/counter
  147. *
  148. * Disables the timer/counter in the PMC
  149. *
  150. * @dev: PMC device to use
  151. * @return 0
  152. */
  153. int pmc_disable_tco(struct udevice *dev);
  154. /**
  155. * pmc_global_reset_set_enable() - Enable/Disable global reset
  156. *
  157. * Enable or disable global reset. If global reset is enabled, both hard
  158. * reset and soft reset will trigger global reset, where both host and
  159. * TXE are reset. This is cleared on cold boot, hard reset, soft reset
  160. * and Sx.
  161. *
  162. * @dev: PMC device to use
  163. * @enable: true to enable global reset, false to disable
  164. * @return 0
  165. */
  166. int pmc_global_reset_set_enable(struct udevice *dev, bool enable);
  167. int pmc_ofdata_to_uc_platdata(struct udevice *dev);
  168. int pmc_disable_tco_base(ulong tco_base);
  169. void pmc_dump_info(struct udevice *dev);
  170. /**
  171. * pmc_gpe_init() - Set up general-purpose events
  172. *
  173. * @dev: PMC device
  174. * @return 0 if OK, -ve on error
  175. */
  176. int pmc_gpe_init(struct udevice *dev);
  177. #endif /* !__ASSEMBLY__ */
  178. #endif