phy.h 15 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <log.h>
  11. #include <phy_interface.h>
  12. #include <dm/ofnode.h>
  13. #include <dm/read.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/mii.h>
  17. #include <linux/ethtool.h>
  18. #include <linux/mdio.h>
  19. struct udevice;
  20. #define PHY_FIXED_ID 0xa5a55a5a
  21. #define PHY_NCSI_ID 0xbeefcafe
  22. /*
  23. * There is no actual id for this.
  24. * This is just a dummy id for gmii2rgmmi converter.
  25. */
  26. #define PHY_GMII2RGMII_ID 0x5a5a5a5a
  27. #define PHY_MAX_ADDR 32
  28. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  29. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  30. SUPPORTED_TP | \
  31. SUPPORTED_MII)
  32. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  33. SUPPORTED_10baseT_Full)
  34. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  35. SUPPORTED_100baseT_Full)
  36. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  37. SUPPORTED_1000baseT_Full)
  38. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  39. PHY_100BT_FEATURES | \
  40. PHY_DEFAULT_FEATURES)
  41. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  42. PHY_1000BT_FEATURES)
  43. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  44. SUPPORTED_10000baseT_Full)
  45. #ifndef PHY_ANEG_TIMEOUT
  46. #define PHY_ANEG_TIMEOUT 4000
  47. #endif
  48. struct phy_device;
  49. #define MDIO_NAME_LEN 32
  50. struct mii_dev {
  51. struct list_head link;
  52. char name[MDIO_NAME_LEN];
  53. void *priv;
  54. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  55. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  56. u16 val);
  57. int (*reset)(struct mii_dev *bus);
  58. struct phy_device *phymap[PHY_MAX_ADDR];
  59. u32 phy_mask;
  60. };
  61. /* struct phy_driver: a structure which defines PHY behavior
  62. *
  63. * uid will contain a number which represents the PHY. During
  64. * startup, the driver will poll the PHY to find out what its
  65. * UID--as defined by registers 2 and 3--is. The 32-bit result
  66. * gotten from the PHY will be masked to
  67. * discard any bits which may change based on revision numbers
  68. * unimportant to functionality
  69. *
  70. */
  71. struct phy_driver {
  72. char *name;
  73. unsigned int uid;
  74. unsigned int mask;
  75. unsigned int mmds;
  76. u32 features;
  77. /* Called to do any driver startup necessities */
  78. /* Will be called during phy_connect */
  79. int (*probe)(struct phy_device *phydev);
  80. /* Called to configure the PHY, and modify the controller
  81. * based on the results. Should be called after phy_connect */
  82. int (*config)(struct phy_device *phydev);
  83. /* Called when starting up the controller */
  84. int (*startup)(struct phy_device *phydev);
  85. /* Called when bringing down the controller */
  86. int (*shutdown)(struct phy_device *phydev);
  87. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  88. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  89. u16 val);
  90. /* Phy specific driver override for reading a MMD register */
  91. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  92. /* Phy specific driver override for writing a MMD register */
  93. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  94. u16 val);
  95. struct list_head list;
  96. /* driver private data */
  97. ulong data;
  98. };
  99. struct phy_device {
  100. /* Information about the PHY type */
  101. /* And management functions */
  102. struct mii_dev *bus;
  103. struct phy_driver *drv;
  104. void *priv;
  105. #ifdef CONFIG_DM_ETH
  106. struct udevice *dev;
  107. ofnode node;
  108. #else
  109. struct eth_device *dev;
  110. #endif
  111. /* forced speed & duplex (no autoneg)
  112. * partner speed & duplex & pause (autoneg)
  113. */
  114. int speed;
  115. int duplex;
  116. /* The most recently read link state */
  117. int link;
  118. int port;
  119. phy_interface_t interface;
  120. u32 advertising;
  121. u32 supported;
  122. u32 mmds;
  123. int autoneg;
  124. int addr;
  125. int pause;
  126. int asym_pause;
  127. u32 phy_id;
  128. bool is_c45;
  129. u32 flags;
  130. };
  131. struct fixed_link {
  132. int phy_id;
  133. int duplex;
  134. int link_speed;
  135. int pause;
  136. int asym_pause;
  137. };
  138. /**
  139. * phy_read - Convenience function for reading a given PHY register
  140. * @phydev: the phy_device struct
  141. * @devad: The MMD to read from
  142. * @regnum: register number to read
  143. * @return: value for success or negative errno for failure
  144. */
  145. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  146. {
  147. struct mii_dev *bus = phydev->bus;
  148. if (!bus || !bus->read) {
  149. debug("%s: No bus configured\n", __func__);
  150. return -1;
  151. }
  152. return bus->read(bus, phydev->addr, devad, regnum);
  153. }
  154. /**
  155. * phy_write - Convenience function for writing a given PHY register
  156. * @phydev: the phy_device struct
  157. * @devad: The MMD to read from
  158. * @regnum: register number to write
  159. * @val: value to write to @regnum
  160. * @return: 0 for success or negative errno for failure
  161. */
  162. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  163. u16 val)
  164. {
  165. struct mii_dev *bus = phydev->bus;
  166. if (!bus || !bus->write) {
  167. debug("%s: No bus configured\n", __func__);
  168. return -1;
  169. }
  170. return bus->write(bus, phydev->addr, devad, regnum, val);
  171. }
  172. /**
  173. * phy_mmd_start_indirect - Convenience function for writing MMD registers
  174. * @phydev: the phy_device struct
  175. * @devad: The MMD to read from
  176. * @regnum: register number to write
  177. * @return: None
  178. */
  179. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  180. int regnum)
  181. {
  182. /* Write the desired MMD Devad */
  183. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  184. /* Write the desired MMD register address */
  185. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  186. /* Select the Function : DATA with no post increment */
  187. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  188. (devad | MII_MMD_CTRL_NOINCR));
  189. }
  190. /**
  191. * phy_read_mmd - Convenience function for reading a register
  192. * from an MMD on a given PHY.
  193. * @phydev: The phy_device struct
  194. * @devad: The MMD to read from
  195. * @regnum: The register on the MMD to read
  196. * @return: Value for success or negative errno for failure
  197. */
  198. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  199. int regnum)
  200. {
  201. struct phy_driver *drv = phydev->drv;
  202. if (regnum > (u16)~0 || devad > 32)
  203. return -EINVAL;
  204. /* driver-specific access */
  205. if (drv->read_mmd)
  206. return drv->read_mmd(phydev, devad, regnum);
  207. /* direct C45 / C22 access */
  208. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  209. devad == MDIO_DEVAD_NONE || !devad)
  210. return phy_read(phydev, devad, regnum);
  211. /* indirect C22 access */
  212. phy_mmd_start_indirect(phydev, devad, regnum);
  213. /* Read the content of the MMD's selected register */
  214. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  215. }
  216. /**
  217. * phy_write_mmd - Convenience function for writing a register
  218. * on an MMD on a given PHY.
  219. * @phydev: The phy_device struct
  220. * @devad: The MMD to read from
  221. * @regnum: The register on the MMD to read
  222. * @val: value to write to @regnum
  223. * @return: 0 for success or negative errno for failure
  224. */
  225. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  226. int regnum, u16 val)
  227. {
  228. struct phy_driver *drv = phydev->drv;
  229. if (regnum > (u16)~0 || devad > 32)
  230. return -EINVAL;
  231. /* driver-specific access */
  232. if (drv->write_mmd)
  233. return drv->write_mmd(phydev, devad, regnum, val);
  234. /* direct C45 / C22 access */
  235. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  236. devad == MDIO_DEVAD_NONE || !devad)
  237. return phy_write(phydev, devad, regnum, val);
  238. /* indirect C22 access */
  239. phy_mmd_start_indirect(phydev, devad, regnum);
  240. /* Write the data into MMD's selected register */
  241. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  242. }
  243. /**
  244. * phy_set_bits_mmd - Convenience function for setting bits in a register
  245. * on MMD
  246. * @phydev: the phy_device struct
  247. * @devad: the MMD containing register to modify
  248. * @regnum: register number to modify
  249. * @val: bits to set
  250. * @return: 0 for success or negative errno for failure
  251. */
  252. static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
  253. u32 regnum, u16 val)
  254. {
  255. int value, ret;
  256. value = phy_read_mmd(phydev, devad, regnum);
  257. if (value < 0)
  258. return value;
  259. value |= val;
  260. ret = phy_write_mmd(phydev, devad, regnum, value);
  261. if (ret < 0)
  262. return ret;
  263. return 0;
  264. }
  265. /**
  266. * phy_clear_bits_mmd - Convenience function for clearing bits in a register
  267. * on MMD
  268. * @phydev: the phy_device struct
  269. * @devad: the MMD containing register to modify
  270. * @regnum: register number to modify
  271. * @val: bits to clear
  272. * @return: 0 for success or negative errno for failure
  273. */
  274. static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
  275. u32 regnum, u16 val)
  276. {
  277. int value, ret;
  278. value = phy_read_mmd(phydev, devad, regnum);
  279. if (value < 0)
  280. return value;
  281. value &= ~val;
  282. ret = phy_write_mmd(phydev, devad, regnum, value);
  283. if (ret < 0)
  284. return ret;
  285. return 0;
  286. }
  287. #ifdef CONFIG_PHYLIB_10G
  288. extern struct phy_driver gen10g_driver;
  289. /*
  290. * List all 10G interfaces here, the assumption being that PHYs on these
  291. * interfaces are C45
  292. */
  293. static inline int is_10g_interface(phy_interface_t interface)
  294. {
  295. return interface == PHY_INTERFACE_MODE_XGMII ||
  296. interface == PHY_INTERFACE_MODE_USXGMII ||
  297. interface == PHY_INTERFACE_MODE_XFI;
  298. }
  299. #endif
  300. /**
  301. * phy_init() - Initializes the PHY drivers
  302. * This function registers all available PHY drivers
  303. *
  304. * @return: 0 if OK, -ve on error
  305. */
  306. int phy_init(void);
  307. /**
  308. * phy_reset() - Resets the specified PHY
  309. * Issues a reset of the PHY and waits for it to complete
  310. *
  311. * @phydev: PHY to reset
  312. * @return: 0 if OK, -ve on error
  313. */
  314. int phy_reset(struct phy_device *phydev);
  315. /**
  316. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  317. * The function checks the PHY addresses flagged in phy_mask and returns a
  318. * phy_device pointer if it detects a PHY.
  319. * This function should only be called if just one PHY is expected to be present
  320. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  321. * it is undefined which of these PHYs is returned.
  322. *
  323. * @bus: MII/MDIO bus to scan
  324. * @phy_mask: bitmap of PYH addresses to scan
  325. * @interface: type of MAC-PHY interface
  326. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  327. */
  328. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  329. phy_interface_t interface);
  330. #ifdef CONFIG_DM_ETH
  331. /**
  332. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  333. * @phydev: PHY device
  334. * @dev: Ethernet device
  335. */
  336. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  337. /**
  338. * phy_connect() - Creates a PHY device for the Ethernet interface
  339. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  340. * already, and associates it with the Ethernet device.
  341. * The function may be called with addr <= 0, in this case addr value is ignored
  342. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  343. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  344. * which PHY is returned.
  345. *
  346. * @bus: MII/MDIO bus that hosts the PHY
  347. * @addr: PHY address on MDIO bus
  348. * @dev: Ethernet device to associate to the PHY
  349. * @interface: type of MAC-PHY interface
  350. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  351. */
  352. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  353. struct udevice *dev,
  354. phy_interface_t interface);
  355. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  356. {
  357. if (ofnode_valid(phydev->node))
  358. return phydev->node;
  359. else
  360. return dev_ofnode(phydev->dev);
  361. }
  362. #else
  363. /**
  364. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  365. * @phydev: PHY device
  366. * @dev: Ethernet device
  367. */
  368. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  369. /**
  370. * phy_connect() - Creates a PHY device for the Ethernet interface
  371. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  372. * already, and associates it with the Ethernet device.
  373. * The function may be called with addr <= 0, in this case addr value is ignored
  374. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  375. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  376. * which PHY is returned.
  377. *
  378. * @bus: MII/MDIO bus that hosts the PHY
  379. * @addr: PHY address on MDIO bus
  380. * @dev: Ethernet device to associate to the PHY
  381. * @interface: type of MAC-PHY interface
  382. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  383. */
  384. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  385. struct eth_device *dev,
  386. phy_interface_t interface);
  387. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  388. {
  389. return ofnode_null();
  390. }
  391. #endif
  392. int phy_startup(struct phy_device *phydev);
  393. int phy_config(struct phy_device *phydev);
  394. int phy_shutdown(struct phy_device *phydev);
  395. int phy_register(struct phy_driver *drv);
  396. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  397. int genphy_config_aneg(struct phy_device *phydev);
  398. int genphy_restart_aneg(struct phy_device *phydev);
  399. int genphy_update_link(struct phy_device *phydev);
  400. int genphy_parse_link(struct phy_device *phydev);
  401. int genphy_config(struct phy_device *phydev);
  402. int genphy_startup(struct phy_device *phydev);
  403. int genphy_shutdown(struct phy_device *phydev);
  404. int gen10g_config(struct phy_device *phydev);
  405. int gen10g_startup(struct phy_device *phydev);
  406. int gen10g_shutdown(struct phy_device *phydev);
  407. int gen10g_discover_mmds(struct phy_device *phydev);
  408. int phy_b53_init(void);
  409. int phy_mv88e61xx_init(void);
  410. int phy_aquantia_init(void);
  411. int phy_atheros_init(void);
  412. int phy_broadcom_init(void);
  413. int phy_cortina_init(void);
  414. int phy_davicom_init(void);
  415. int phy_et1011c_init(void);
  416. int phy_lxt_init(void);
  417. int phy_marvell_init(void);
  418. int phy_micrel_ksz8xxx_init(void);
  419. int phy_micrel_ksz90x1_init(void);
  420. int phy_meson_gxl_init(void);
  421. int phy_natsemi_init(void);
  422. int phy_realtek_init(void);
  423. int phy_smsc_init(void);
  424. int phy_teranetics_init(void);
  425. int phy_ti_init(void);
  426. int phy_vitesse_init(void);
  427. int phy_xilinx_init(void);
  428. int phy_mscc_init(void);
  429. int phy_fixed_init(void);
  430. int phy_ncsi_init(void);
  431. int phy_xilinx_gmii2rgmii_init(void);
  432. int board_phy_config(struct phy_device *phydev);
  433. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  434. /**
  435. * phy_get_interface_by_name() - Look up a PHY interface name
  436. *
  437. * @str: PHY interface name, e.g. "mii"
  438. * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
  439. */
  440. int phy_get_interface_by_name(const char *str);
  441. /**
  442. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  443. * is RGMII (all variants)
  444. * @phydev: the phy_device struct
  445. * @return: true if MII bus is RGMII or false if it is not
  446. */
  447. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  448. {
  449. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  450. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  451. }
  452. /**
  453. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  454. * is SGMII (all variants)
  455. * @phydev: the phy_device struct
  456. * @return: true if MII bus is SGMII or false if it is not
  457. */
  458. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  459. {
  460. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  461. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  462. }
  463. /* PHY UIDs for various PHYs that are referenced in external code */
  464. #define PHY_UID_CS4340 0x13e51002
  465. #define PHY_UID_CS4223 0x03e57003
  466. #define PHY_UID_TN2020 0x00a19410
  467. #define PHY_UID_IN112525_S03 0x02107440
  468. #endif