mxs_nand.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * NXP GPMI NAND flash driver
  4. *
  5. * Copyright (C) 2018 Toradex
  6. * Authors:
  7. * Stefan Agner <stefan.agner@toradex.com>
  8. */
  9. #include <linux/mtd/mtd.h>
  10. #include <asm/cache.h>
  11. #include <nand.h>
  12. #include <asm/mach-imx/dma.h>
  13. /**
  14. * @gf_len: The length of Galois Field. (e.g., 13 or 14)
  15. * @ecc_strength: A number that describes the strength of the ECC
  16. * algorithm.
  17. * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk.
  18. * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after
  19. * the first chunk in the page.
  20. * @ecc_chunk_count: The number of ECC chunks in the page,
  21. * @block_mark_byte_offset: The byte offset in the ECC-based page view at
  22. * which the underlying physical block mark appears.
  23. * @block_mark_bit_offset: The bit offset into the ECC-based page view at
  24. * which the underlying physical block mark appears.
  25. * @ecc_for_meta: The flag to indicate if there is a dedicate ecc
  26. * for meta.
  27. */
  28. struct bch_geometry {
  29. unsigned int gf_len;
  30. unsigned int ecc_strength;
  31. unsigned int ecc_chunk0_size;
  32. unsigned int ecc_chunkn_size;
  33. unsigned int ecc_chunk_count;
  34. unsigned int block_mark_byte_offset;
  35. unsigned int block_mark_bit_offset;
  36. unsigned int ecc_for_meta; /* ECC for meta data */
  37. };
  38. struct mxs_nand_info {
  39. struct nand_chip chip;
  40. struct udevice *dev;
  41. unsigned int max_ecc_strength_supported;
  42. bool use_minimum_ecc;
  43. /* legacy bch geometry flag */
  44. bool legacy_bch_geometry;
  45. int cur_chip;
  46. uint32_t cmd_queue_len;
  47. uint32_t data_buf_size;
  48. struct bch_geometry bch_geometry;
  49. uint8_t *cmd_buf;
  50. uint8_t *data_buf;
  51. uint8_t *oob_buf;
  52. uint8_t marking_block_bad;
  53. uint8_t raw_oob_mode;
  54. struct mxs_gpmi_regs *gpmi_regs;
  55. struct mxs_bch_regs *bch_regs;
  56. /* Functions with altered behaviour */
  57. int (*hooked_read_oob)(struct mtd_info *mtd,
  58. loff_t from, struct mtd_oob_ops *ops);
  59. int (*hooked_write_oob)(struct mtd_info *mtd,
  60. loff_t to, struct mtd_oob_ops *ops);
  61. int (*hooked_block_markbad)(struct mtd_info *mtd,
  62. loff_t ofs);
  63. /* DMA descriptors */
  64. struct mxs_dma_desc **desc;
  65. uint32_t desc_index;
  66. /* Hardware BCH interface and randomizer */
  67. u32 en_randomizer;
  68. u32 writesize;
  69. u32 oobsize;
  70. u32 bch_flash0layout0;
  71. u32 bch_flash0layout1;
  72. };
  73. struct mxs_nand_layout {
  74. u32 nblocks;
  75. u32 meta_size;
  76. u32 data0_size;
  77. u32 ecc0;
  78. u32 datan_size;
  79. u32 eccn;
  80. u32 gf_len;
  81. };
  82. int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
  83. int mxs_nand_init_spl(struct nand_chip *nand);
  84. int mxs_nand_setup_ecc(struct mtd_info *mtd);
  85. void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd);
  86. void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd);
  87. void mxs_nand_mode_normal(struct mtd_info *mtd);
  88. u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
  89. u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
  90. void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);