i2c.h 27 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. #include <linker_lists.h>
  18. /*
  19. * For now there are essentially two parts to this file - driver model
  20. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  21. * most recent). The plan is to migrate everything to driver model.
  22. * The driver model structures and API are separate as they are different
  23. * enough as to be incompatible for compilation purposes.
  24. */
  25. enum dm_i2c_chip_flags {
  26. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  27. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  28. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  29. };
  30. /** enum i2c_speed_mode - standard I2C speed modes */
  31. enum i2c_speed_mode {
  32. IC_SPEED_MODE_STANDARD,
  33. IC_SPEED_MODE_FAST,
  34. IC_SPEED_MODE_FAST_PLUS,
  35. IC_SPEED_MODE_HIGH,
  36. IC_SPEED_MODE_FAST_ULTRA,
  37. IC_SPEED_MODE_COUNT,
  38. };
  39. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  40. enum i2c_speed_rate {
  41. I2C_SPEED_STANDARD_RATE = 100000,
  42. I2C_SPEED_FAST_RATE = 400000,
  43. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  44. I2C_SPEED_HIGH_RATE = 3400000,
  45. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  46. };
  47. /** enum i2c_address_mode - available address modes */
  48. enum i2c_address_mode {
  49. I2C_MODE_7_BIT,
  50. I2C_MODE_10_BIT
  51. };
  52. /** enum i2c_device_t - Types of I2C devices, used for compatible strings */
  53. enum i2c_device_t {
  54. I2C_DEVICE_GENERIC,
  55. I2C_DEVICE_HID_OVER_I2C,
  56. };
  57. struct udevice;
  58. /**
  59. * struct dm_i2c_chip - information about an i2c chip
  60. *
  61. * An I2C chip is a device on the I2C bus. It sits at a particular address
  62. * and normally supports 7-bit or 10-bit addressing.
  63. *
  64. * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  65. * the chip to examine.
  66. *
  67. * @chip_addr: Chip address on bus
  68. * @offset_len: Length of offset in bytes. A single byte offset can
  69. * represent up to 256 bytes. A value larger than 1 may be
  70. * needed for larger devices.
  71. * @flags: Flags for this chip (dm_i2c_chip_flags)
  72. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  73. * devices which steal addresses as part of offset.
  74. * If offset_len is zero, then the offset is encoded
  75. * completely within the chip address itself.
  76. * e.g. a devce with chip address of 0x2c with 512
  77. * registers might use the bottom bit of the address
  78. * to indicate which half of the address space is being
  79. * accessed while still only using 1 byte offset.
  80. * This means it will respond to chip address 0x2c and
  81. * 0x2d.
  82. * A real world example is the Atmel AT24C04. It's
  83. * datasheet explains it's usage of this addressing
  84. * mode.
  85. * @emul: Emulator for this chip address (only used for emulation)
  86. */
  87. struct dm_i2c_chip {
  88. uint chip_addr;
  89. uint offset_len;
  90. uint flags;
  91. uint chip_addr_offset_mask;
  92. #ifdef CONFIG_SANDBOX
  93. struct udevice *emul;
  94. bool test_mode;
  95. #endif
  96. };
  97. /**
  98. * struct dm_i2c_bus- information about an i2c bus
  99. *
  100. * An I2C bus contains 0 or more chips on it, each at its own address. The
  101. * bus can operate at different speeds (measured in Hz, typically 100KHz
  102. * or 400KHz).
  103. *
  104. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  105. * I2C bus udevice.
  106. *
  107. * @speed_hz: Bus speed in hertz (typically 100000)
  108. * @max_transaction_bytes: Maximal size of single I2C transfer
  109. */
  110. struct dm_i2c_bus {
  111. int speed_hz;
  112. int max_transaction_bytes;
  113. };
  114. /*
  115. * Not all of these flags are implemented in the U-Boot API
  116. */
  117. enum dm_i2c_msg_flags {
  118. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  119. I2C_M_RD = 0x0001, /* read data, from slave to master */
  120. I2C_M_STOP = 0x8000, /* send stop after this message */
  121. I2C_M_NOSTART = 0x4000, /* no start before this message */
  122. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  123. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  124. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  125. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  126. };
  127. /**
  128. * struct i2c_msg - an I2C message
  129. *
  130. * @addr: Slave address
  131. * @flags: Flags (see enum dm_i2c_msg_flags)
  132. * @len: Length of buffer in bytes, may be 0 for a probe
  133. * @buf: Buffer to send/receive, or NULL if no data
  134. */
  135. struct i2c_msg {
  136. uint addr;
  137. uint flags;
  138. uint len;
  139. u8 *buf;
  140. };
  141. /**
  142. * struct i2c_msg_list - a list of I2C messages
  143. *
  144. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  145. * appropriate in U-Boot.
  146. *
  147. * @msg: Pointer to i2c_msg array
  148. * @nmsgs: Number of elements in the array
  149. */
  150. struct i2c_msg_list {
  151. struct i2c_msg *msgs;
  152. uint nmsgs;
  153. };
  154. /**
  155. * dm_i2c_read() - read bytes from an I2C chip
  156. *
  157. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  158. * can use i2c_get_chip(). To obtain a bus by bus number use
  159. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  160. *
  161. * To set the address length of a devce use i2c_set_addr_len(). It
  162. * defaults to 1.
  163. *
  164. * @dev: Chip to read from
  165. * @offset: Offset within chip to start reading
  166. * @buffer: Place to put data
  167. * @len: Number of bytes to read
  168. *
  169. * @return 0 on success, -ve on failure
  170. */
  171. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  172. /**
  173. * dm_i2c_write() - write bytes to an I2C chip
  174. *
  175. * See notes for dm_i2c_read() above.
  176. *
  177. * @dev: Chip to write to
  178. * @offset: Offset within chip to start writing
  179. * @buffer: Buffer containing data to write
  180. * @len: Number of bytes to write
  181. *
  182. * @return 0 on success, -ve on failure
  183. */
  184. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  185. int len);
  186. /**
  187. * dm_i2c_probe() - probe a particular chip address
  188. *
  189. * This can be useful to check for the existence of a chip on the bus.
  190. * It is typically implemented by writing the chip address to the bus
  191. * and checking that the chip replies with an ACK.
  192. *
  193. * @bus: Bus to probe
  194. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  195. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  196. * @devp: Returns the device found, or NULL if none
  197. * @return 0 if a chip was found at that address, -ve if not
  198. */
  199. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  200. struct udevice **devp);
  201. /**
  202. * dm_i2c_reg_read() - Read a value from an I2C register
  203. *
  204. * This reads a single value from the given address in an I2C chip
  205. *
  206. * @dev: Device to use for transfer
  207. * @addr: Address to read from
  208. * @return value read, or -ve on error
  209. */
  210. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  211. /**
  212. * dm_i2c_reg_write() - Write a value to an I2C register
  213. *
  214. * This writes a single value to the given address in an I2C chip
  215. *
  216. * @dev: Device to use for transfer
  217. * @addr: Address to write to
  218. * @val: Value to write (normally a byte)
  219. * @return 0 on success, -ve on error
  220. */
  221. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  222. /**
  223. * dm_i2c_xfer() - Transfer messages over I2C
  224. *
  225. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  226. * instead.
  227. *
  228. * @dev: Device to use for transfer
  229. * @msg: List of messages to transfer
  230. * @nmsgs: Number of messages to transfer
  231. * @return 0 on success, -ve on error
  232. */
  233. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  234. /**
  235. * dm_i2c_set_bus_speed() - set the speed of a bus
  236. *
  237. * @bus: Bus to adjust
  238. * @speed: Requested speed in Hz
  239. * @return 0 if OK, -EINVAL for invalid values
  240. */
  241. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  242. /**
  243. * dm_i2c_get_bus_speed() - get the speed of a bus
  244. *
  245. * @bus: Bus to check
  246. * @return speed of selected I2C bus in Hz, -ve on error
  247. */
  248. int dm_i2c_get_bus_speed(struct udevice *bus);
  249. /**
  250. * i2c_set_chip_flags() - set flags for a chip
  251. *
  252. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  253. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  254. *
  255. * @dev: Chip to adjust
  256. * @flags: New flags
  257. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  258. */
  259. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  260. /**
  261. * i2c_get_chip_flags() - get flags for a chip
  262. *
  263. * @dev: Chip to check
  264. * @flagsp: Place to put flags
  265. * @return 0 if OK, other -ve value on error
  266. */
  267. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  268. /**
  269. * i2c_set_offset_len() - set the offset length for a chip
  270. *
  271. * The offset used to access a chip may be up to 4 bytes long. Typically it
  272. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  273. * registers. The default value is 1, but you can call this function to
  274. * change it.
  275. *
  276. * @offset_len: New offset length value (typically 1 or 2)
  277. */
  278. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  279. /**
  280. * i2c_get_offset_len() - get the offset length for a chip
  281. *
  282. * @return: Current offset length value (typically 1 or 2)
  283. */
  284. int i2c_get_chip_offset_len(struct udevice *dev);
  285. /**
  286. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  287. *
  288. * Some devices listen on multiple chip addresses to achieve larger offsets
  289. * than their single or multiple byte offsets would allow for. You can use this
  290. * function to set the bits that are valid to be used for offset overflow.
  291. *
  292. * @mask: The mask to be used for high offset bits within address
  293. * @return 0 if OK, other -ve value on error
  294. */
  295. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  296. /*
  297. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  298. *
  299. * @return current chip addr offset mask
  300. */
  301. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  302. /**
  303. * i2c_deblock() - recover a bus that is in an unknown state
  304. *
  305. * See the deblock() method in 'struct dm_i2c_ops' for full information
  306. *
  307. * @bus: Bus to recover
  308. * @return 0 if OK, -ve on error
  309. */
  310. int i2c_deblock(struct udevice *bus);
  311. /**
  312. * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
  313. *
  314. * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
  315. * for deblocking the I2C bus.
  316. *
  317. * @sda_pin: SDA GPIO
  318. * @scl_pin: SCL GPIO
  319. * @scl_count: Number of SCL clock cycles generated to deblock SDA
  320. * @start_count:Number of I2C start conditions sent after deblocking SDA
  321. * @delay: Delay between SCL clock line changes
  322. * @return 0 if OK, -ve on error
  323. */
  324. struct gpio_desc;
  325. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
  326. unsigned int scl_count, unsigned int start_count,
  327. unsigned int delay);
  328. /**
  329. * struct dm_i2c_ops - driver operations for I2C uclass
  330. *
  331. * Drivers should support these operations unless otherwise noted. These
  332. * operations are intended to be used by uclass code, not directly from
  333. * other code.
  334. */
  335. struct dm_i2c_ops {
  336. /**
  337. * xfer() - transfer a list of I2C messages
  338. *
  339. * @bus: Bus to read from
  340. * @msg: List of messages to transfer
  341. * @nmsgs: Number of messages in the list
  342. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  343. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  344. * flags cannot be supported, other -ve value on some other error
  345. */
  346. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  347. /**
  348. * probe_chip() - probe for the presense of a chip address
  349. *
  350. * This function is optional. If omitted, the uclass will send a zero
  351. * length message instead.
  352. *
  353. * @bus: Bus to probe
  354. * @chip_addr: Chip address to probe
  355. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  356. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  357. * to default probem other -ve value on error
  358. */
  359. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  360. /**
  361. * set_bus_speed() - set the speed of a bus (optional)
  362. *
  363. * The bus speed value will be updated by the uclass if this function
  364. * does not return an error. This method is optional - if it is not
  365. * provided then the driver can read the speed from
  366. * dev_get_uclass_priv(bus)->speed_hz
  367. *
  368. * @bus: Bus to adjust
  369. * @speed: Requested speed in Hz
  370. * @return 0 if OK, -EINVAL for invalid values
  371. */
  372. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  373. /**
  374. * get_bus_speed() - get the speed of a bus (optional)
  375. *
  376. * Normally this can be provided by the uclass, but if you want your
  377. * driver to check the bus speed by looking at the hardware, you can
  378. * implement that here. This method is optional. This method would
  379. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  380. *
  381. * @bus: Bus to check
  382. * @return speed of selected I2C bus in Hz, -ve on error
  383. */
  384. int (*get_bus_speed)(struct udevice *bus);
  385. /**
  386. * set_flags() - set the flags for a chip (optional)
  387. *
  388. * This is generally implemented by the uclass, but drivers can
  389. * check the value to ensure that unsupported options are not used.
  390. * This method is optional. If provided, this method will always be
  391. * called when the flags change.
  392. *
  393. * @dev: Chip to adjust
  394. * @flags: New flags value
  395. * @return 0 if OK, -EINVAL if value is unsupported
  396. */
  397. int (*set_flags)(struct udevice *dev, uint flags);
  398. /**
  399. * deblock() - recover a bus that is in an unknown state
  400. *
  401. * I2C is a synchronous protocol and resets of the processor in the
  402. * middle of an access can block the I2C Bus until a powerdown of
  403. * the full unit is done. This is because slaves can be stuck
  404. * waiting for addition bus transitions for a transaction that will
  405. * never complete. Resetting the I2C master does not help. The only
  406. * way is to force the bus through a series of transitions to make
  407. * sure that all slaves are done with the transaction. This method
  408. * performs this 'deblocking' if support by the driver.
  409. *
  410. * This method is optional.
  411. */
  412. int (*deblock)(struct udevice *bus);
  413. };
  414. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  415. /**
  416. * struct i2c_mux_ops - operations for an I2C mux
  417. *
  418. * The current mux state is expected to be stored in the mux itself since
  419. * it is the only thing that knows how to make things work. The mux can
  420. * record the current state and then avoid switching unless it is necessary.
  421. * So select() can be skipped if the mux is already in the correct state.
  422. * Also deselect() can be made a nop if required.
  423. */
  424. struct i2c_mux_ops {
  425. /**
  426. * select() - select one of of I2C buses attached to a mux
  427. *
  428. * This will be called when there is no bus currently selected by the
  429. * mux. This method does not need to deselect the old bus since
  430. * deselect() will be already have been called if necessary.
  431. *
  432. * @mux: Mux device
  433. * @bus: I2C bus to select
  434. * @channel: Channel number correponding to the bus to select
  435. * @return 0 if OK, -ve on error
  436. */
  437. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  438. /**
  439. * deselect() - select one of of I2C buses attached to a mux
  440. *
  441. * This is used to deselect the currently selected I2C bus.
  442. *
  443. * @mux: Mux device
  444. * @bus: I2C bus to deselect
  445. * @channel: Channel number correponding to the bus to deselect
  446. * @return 0 if OK, -ve on error
  447. */
  448. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  449. };
  450. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  451. /**
  452. * i2c_get_chip() - get a device to use to access a chip on a bus
  453. *
  454. * This returns the device for the given chip address. The device can then
  455. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  456. *
  457. * @bus: Bus to examine
  458. * @chip_addr: Chip address for the new device
  459. * @offset_len: Length of a register offset in bytes (normally 1)
  460. * @devp: Returns pointer to new device if found or -ENODEV if not
  461. * found
  462. */
  463. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  464. struct udevice **devp);
  465. /**
  466. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  467. * a bus number
  468. *
  469. * This returns the device for the given chip address on a particular bus
  470. * number.
  471. *
  472. * @busnum: Bus number to examine
  473. * @chip_addr: Chip address for the new device
  474. * @offset_len: Length of a register offset in bytes (normally 1)
  475. * @devp: Returns pointer to new device if found or -ENODEV if not
  476. * found
  477. */
  478. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  479. struct udevice **devp);
  480. /**
  481. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  482. *
  483. * This decodes the chip address from a device tree node and puts it into
  484. * its dm_i2c_chip structure. This should be called in your driver's
  485. * ofdata_to_platdata() method.
  486. *
  487. * @blob: Device tree blob
  488. * @node: Node offset to read from
  489. * @spi: Place to put the decoded information
  490. */
  491. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
  492. /**
  493. * i2c_dump_msgs() - Dump a list of I2C messages
  494. *
  495. * This may be useful for debugging.
  496. *
  497. * @msg: Message list to dump
  498. * @nmsgs: Number of messages
  499. */
  500. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  501. /**
  502. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  503. *
  504. * This looks at the device's 'emul' phandle
  505. *
  506. * @dev: Device to find an emulator for
  507. * @emulp: Returns the associated emulator, if found *
  508. * @return 0 if OK, -ENOENT or -ENODEV if not found
  509. */
  510. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  511. /**
  512. * i2c_emul_get_device() - Find the device being emulated
  513. *
  514. * Given an emulator this returns the associated device
  515. *
  516. * @emul: Emulator for the device
  517. * @return device that @emul is emulating
  518. */
  519. struct udevice *i2c_emul_get_device(struct udevice *emul);
  520. /* ACPI operations for generic I2C devices */
  521. extern struct acpi_ops i2c_acpi_ops;
  522. /**
  523. * acpi_i2c_ofdata_to_platdata() - Read properties intended for ACPI
  524. *
  525. * This reads the generic I2C properties from the device tree, so that these
  526. * can be used to create ACPI information for the device.
  527. *
  528. * See the i2c/generic-acpi.txt binding file for information about the
  529. * properties.
  530. *
  531. * @dev: I2C device to process
  532. * @return 0 if OK, -EINVAL if acpi,hid is not present
  533. */
  534. int acpi_i2c_ofdata_to_platdata(struct udevice *dev);
  535. #ifndef CONFIG_DM_I2C
  536. /*
  537. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  538. *
  539. * The implementation MUST NOT use static or global variables if the
  540. * I2C routines are used to read SDRAM configuration information
  541. * because this is done before the memories are initialized. Limited
  542. * use of stack-based variables are OK (the initial stack size is
  543. * limited).
  544. *
  545. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  546. */
  547. /*
  548. * Configuration items.
  549. */
  550. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  551. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  552. /* no muxes used bus = i2c adapters */
  553. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  554. #define CONFIG_SYS_I2C_MAX_HOPS 0
  555. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  556. #else
  557. /* we use i2c muxes */
  558. #undef CONFIG_SYS_I2C_DIRECT_BUS
  559. #endif
  560. /* define the I2C bus number for RTC and DTT if not already done */
  561. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  562. #define CONFIG_SYS_RTC_BUS_NUM 0
  563. #endif
  564. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  565. #define CONFIG_SYS_SPD_BUS_NUM 0
  566. #endif
  567. struct i2c_adapter {
  568. void (*init)(struct i2c_adapter *adap, int speed,
  569. int slaveaddr);
  570. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  571. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  572. uint addr, int alen, uint8_t *buffer,
  573. int len);
  574. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  575. uint addr, int alen, uint8_t *buffer,
  576. int len);
  577. uint (*set_bus_speed)(struct i2c_adapter *adap,
  578. uint speed);
  579. int speed;
  580. int waitdelay;
  581. int slaveaddr;
  582. int init_done;
  583. int hwadapnr;
  584. char *name;
  585. };
  586. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  587. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  588. { \
  589. .init = _init, \
  590. .probe = _probe, \
  591. .read = _read, \
  592. .write = _write, \
  593. .set_bus_speed = _set_speed, \
  594. .speed = _speed, \
  595. .slaveaddr = _slaveaddr, \
  596. .init_done = 0, \
  597. .hwadapnr = _hwadapnr, \
  598. .name = #_name \
  599. };
  600. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  601. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  602. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  603. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  604. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  605. struct i2c_adapter *i2c_get_adapter(int index);
  606. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  607. struct i2c_mux {
  608. int id;
  609. char name[16];
  610. };
  611. struct i2c_next_hop {
  612. struct i2c_mux mux;
  613. uint8_t chip;
  614. uint8_t channel;
  615. };
  616. struct i2c_bus_hose {
  617. int adapter;
  618. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  619. };
  620. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  621. extern struct i2c_bus_hose i2c_bus[];
  622. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  623. #else
  624. #define I2C_ADAPTER(bus) bus
  625. #endif
  626. #define I2C_BUS gd->cur_i2c_bus
  627. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  628. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  629. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  630. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  631. #define I2C_MUX_PCA9540_ID 1
  632. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  633. #define I2C_MUX_PCA9542_ID 2
  634. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  635. #define I2C_MUX_PCA9544_ID 3
  636. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  637. #define I2C_MUX_PCA9547_ID 4
  638. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  639. #define I2C_MUX_PCA9548_ID 5
  640. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  641. #endif
  642. #ifndef I2C_SOFT_DECLARATIONS
  643. # if (defined(CONFIG_AT91RM9200) || \
  644. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  645. defined(CONFIG_AT91SAM9263))
  646. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  647. # else
  648. # define I2C_SOFT_DECLARATIONS
  649. # endif
  650. #endif
  651. /*
  652. * Many boards/controllers/drivers don't support an I2C slave interface so
  653. * provide a default slave address for them for use in common code. A real
  654. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  655. * support a slave interface.
  656. */
  657. #ifndef CONFIG_SYS_I2C_SLAVE
  658. #define CONFIG_SYS_I2C_SLAVE 0xfe
  659. #endif
  660. /*
  661. * Initialization, must be called once on start up, may be called
  662. * repeatedly to change the speed and slave addresses.
  663. */
  664. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  665. void i2c_early_init_f(void);
  666. #endif
  667. void i2c_init(int speed, int slaveaddr);
  668. void i2c_init_board(void);
  669. #ifdef CONFIG_SYS_I2C
  670. /*
  671. * i2c_get_bus_num:
  672. *
  673. * Returns index of currently active I2C bus. Zero-based.
  674. */
  675. unsigned int i2c_get_bus_num(void);
  676. /*
  677. * i2c_set_bus_num:
  678. *
  679. * Change the active I2C bus. Subsequent read/write calls will
  680. * go to this one.
  681. *
  682. * bus - bus index, zero based
  683. *
  684. * Returns: 0 on success, not 0 on failure
  685. *
  686. */
  687. int i2c_set_bus_num(unsigned int bus);
  688. /*
  689. * i2c_init_all():
  690. *
  691. * Initializes all I2C adapters in the system. All i2c_adap structures must
  692. * be initialized beforehead with function pointers and data, including
  693. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  694. */
  695. void i2c_init_all(void);
  696. /*
  697. * Probe the given I2C chip address. Returns 0 if a chip responded,
  698. * not 0 on failure.
  699. */
  700. int i2c_probe(uint8_t chip);
  701. /*
  702. * Read/Write interface:
  703. * chip: I2C chip address, range 0..127
  704. * addr: Memory (register) address within the chip
  705. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  706. * memories, 0 for register type devices with only one
  707. * register)
  708. * buffer: Where to read/write the data
  709. * len: How many bytes to read/write
  710. *
  711. * Returns: 0 on success, not 0 on failure
  712. */
  713. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  714. uint8_t *buffer, int len);
  715. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  716. uint8_t *buffer, int len);
  717. /*
  718. * Utility routines to read/write registers.
  719. */
  720. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  721. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  722. /*
  723. * i2c_set_bus_speed:
  724. *
  725. * Change the speed of the active I2C bus
  726. *
  727. * speed - bus speed in Hz
  728. *
  729. * Returns: new bus speed
  730. *
  731. */
  732. unsigned int i2c_set_bus_speed(unsigned int speed);
  733. /*
  734. * i2c_get_bus_speed:
  735. *
  736. * Returns speed of currently active I2C bus in Hz
  737. */
  738. unsigned int i2c_get_bus_speed(void);
  739. #else
  740. /*
  741. * Probe the given I2C chip address. Returns 0 if a chip responded,
  742. * not 0 on failure.
  743. */
  744. int i2c_probe(uchar chip);
  745. /*
  746. * Read/Write interface:
  747. * chip: I2C chip address, range 0..127
  748. * addr: Memory (register) address within the chip
  749. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  750. * memories, 0 for register type devices with only one
  751. * register)
  752. * buffer: Where to read/write the data
  753. * len: How many bytes to read/write
  754. *
  755. * Returns: 0 on success, not 0 on failure
  756. */
  757. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  758. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  759. /*
  760. * Utility routines to read/write registers.
  761. */
  762. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  763. {
  764. u8 buf;
  765. #ifdef DEBUG
  766. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  767. #endif
  768. i2c_read(addr, reg, 1, &buf, 1);
  769. return buf;
  770. }
  771. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  772. {
  773. #ifdef DEBUG
  774. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  775. __func__, addr, reg, val);
  776. #endif
  777. i2c_write(addr, reg, 1, &val, 1);
  778. }
  779. /*
  780. * Functions for setting the current I2C bus and its speed
  781. */
  782. /*
  783. * i2c_set_bus_num:
  784. *
  785. * Change the active I2C bus. Subsequent read/write calls will
  786. * go to this one.
  787. *
  788. * bus - bus index, zero based
  789. *
  790. * Returns: 0 on success, not 0 on failure
  791. *
  792. */
  793. int i2c_set_bus_num(unsigned int bus);
  794. /*
  795. * i2c_get_bus_num:
  796. *
  797. * Returns index of currently active I2C bus. Zero-based.
  798. */
  799. unsigned int i2c_get_bus_num(void);
  800. /*
  801. * i2c_set_bus_speed:
  802. *
  803. * Change the speed of the active I2C bus
  804. *
  805. * speed - bus speed in Hz
  806. *
  807. * Returns: 0 on success, not 0 on failure
  808. *
  809. */
  810. int i2c_set_bus_speed(unsigned int);
  811. /*
  812. * i2c_get_bus_speed:
  813. *
  814. * Returns speed of currently active I2C bus in Hz
  815. */
  816. unsigned int i2c_get_bus_speed(void);
  817. #endif /* CONFIG_SYS_I2C */
  818. /*
  819. * only for backwardcompatibility, should go away if we switched
  820. * completely to new multibus support.
  821. */
  822. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  823. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  824. # define CONFIG_SYS_MAX_I2C_BUS 2
  825. # endif
  826. # define I2C_MULTI_BUS 1
  827. #else
  828. # define CONFIG_SYS_MAX_I2C_BUS 1
  829. # define I2C_MULTI_BUS 0
  830. #endif
  831. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  832. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  833. static inline unsigned int I2C_GET_BUS(void)
  834. {
  835. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  836. }
  837. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  838. static inline void I2C_SET_BUS(unsigned int bus)
  839. {
  840. if (I2C_MULTI_BUS)
  841. i2c_set_bus_num(bus);
  842. }
  843. /* Multi I2C definitions */
  844. enum {
  845. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  846. I2C_8, I2C_9, I2C_10,
  847. };
  848. /**
  849. * Get FDT values for i2c bus.
  850. *
  851. * @param blob Device tree blbo
  852. * @return the number of I2C bus
  853. */
  854. void board_i2c_init(const void *blob);
  855. /**
  856. * Find the I2C bus number by given a FDT I2C node.
  857. *
  858. * @param blob Device tree blbo
  859. * @param node FDT I2C node to find
  860. * @return the number of I2C bus (zero based), or -1 on error
  861. */
  862. int i2c_get_bus_num_fdt(int node);
  863. /**
  864. * Reset the I2C bus represented by the given a FDT I2C node.
  865. *
  866. * @param blob Device tree blbo
  867. * @param node FDT I2C node to find
  868. * @return 0 if port was reset, -1 if not found
  869. */
  870. int i2c_reset_port_fdt(const void *blob, int node);
  871. #endif /* !CONFIG_DM_I2C */
  872. #endif /* _I2C_H_ */