ftsdc010.h 9.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Faraday FTSDC010 Secure Digital Memory Card Host Controller
  4. *
  5. * Copyright (C) 2011 Andes Technology Corporation
  6. * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
  7. */
  8. #ifndef __FTSDC010_H
  9. #define __FTSDC010_H
  10. #ifndef __ASSEMBLY__
  11. /* sd controller register */
  12. #include <linux/bitops.h>
  13. struct ftsdc010_mmc {
  14. unsigned int cmd; /* 0x00 - command reg */
  15. unsigned int argu; /* 0x04 - argument reg */
  16. unsigned int rsp0; /* 0x08 - response reg0 */
  17. unsigned int rsp1; /* 0x0c - response reg1 */
  18. unsigned int rsp2; /* 0x10 - response reg2 */
  19. unsigned int rsp3; /* 0x14 - response reg3 */
  20. unsigned int rsp_cmd; /* 0x18 - responded cmd reg */
  21. unsigned int dcr; /* 0x1c - data control reg */
  22. unsigned int dtr; /* 0x20 - data timer reg */
  23. unsigned int dlr; /* 0x24 - data length reg */
  24. unsigned int status; /* 0x28 - status reg */
  25. unsigned int clr; /* 0x2c - clear reg */
  26. unsigned int int_mask; /* 0x30 - intrrupt mask reg */
  27. unsigned int pcr; /* 0x34 - power control reg */
  28. unsigned int ccr; /* 0x38 - clock contorl reg */
  29. unsigned int bwr; /* 0x3c - bus width reg */
  30. unsigned int dwr; /* 0x40 - data window reg */
  31. #ifndef CONFIG_FTSDC010_SDIO
  32. unsigned int feature; /* 0x44 - feature reg */
  33. unsigned int rev; /* 0x48 - revision reg */
  34. #else
  35. unsigned int mmc_intr_time; /* 0x44 - MMC int resp time reg */
  36. unsigned int gpo; /* 0x48 - gerenal purpose output */
  37. unsigned int reserved[8]; /* 0x50 - 0x68 reserved */
  38. unsigned int sdio_ctrl1; /* 0x6c - SDIO control reg 1 */
  39. unsigned int sdio_ctrl2; /* 0x70 - SDIO control reg 2 */
  40. unsigned int sdio_status; /* 0x74 - SDIO status regi */
  41. unsigned int reserved1[9]; /* 0x78 - 0x98 reserved */
  42. unsigned int feature; /* 0x9c - feature reg */
  43. unsigned int rev; /* 0xa0 - revision reg */
  44. #endif /* CONFIG_FTSDC010_SDIO */
  45. };
  46. struct mmc_host {
  47. struct ftsdc010_mmc *reg;
  48. unsigned int version; /* SDHCI spec. version */
  49. unsigned int clock; /* Current clock (MHz) */
  50. unsigned int fifo_len; /* bytes */
  51. unsigned int last_opcode; /* Last OP Code */
  52. unsigned int card_type; /* Card type */
  53. };
  54. /* functions */
  55. int ftsdc010_mmc_init(int dev_index);
  56. #endif /* __ASSEMBLY__ */
  57. /* global defines */
  58. #define FTSDC010_CMD_RETRY 0x100000
  59. #define FTSDC010_PIO_RETRY 100 /* pio retry times */
  60. #define FTSDC010_DELAY_UNIT 100 /* 100 us */
  61. /* define from Linux kernel - include/linux/mmc/card.h */
  62. #define MMC_TYPE_SDIO 2 /* SDIO card */
  63. /* define for mmc layer */
  64. #define MMC_DATA_BOTH_DIR (MMC_DATA_WRITE | MMC_DATA_READ)
  65. /* this part is strange */
  66. #define FTSDC010_SDIO_CTRL1_REG 0x0000006C
  67. #define FTSDC010_SDIO_CTRL2_REG 0x0000006C
  68. #define FTSDC010_SDIO_STATUS_REG 0x00000070
  69. /* 0x00 - command register */
  70. #define FTSDC010_CMD_IDX(x) (((x) & 0x3f) << 0)
  71. #define FTSDC010_CMD_NEED_RSP (1 << 6)
  72. #define FTSDC010_CMD_LONG_RSP (1 << 7)
  73. #define FTSDC010_CMD_APP_CMD (1 << 8)
  74. #define FTSDC010_CMD_CMD_EN (1 << 9)
  75. #define FTSDC010_CMD_SDC_RST (1 << 10)
  76. #define FTSDC010_CMD_MMC_INT_STOP (1 << 11)
  77. /* 0x18 - responded command register */
  78. #define FTSDC010_RSP_CMD_IDX(x) (((x) >> 0) & 0x3f)
  79. #define FTSDC010_RSP_CMD_APP (1 << 6)
  80. /* 0x1c - data control register */
  81. #define FTSDC010_DCR_BLK_SIZE(x) (((x) & 0xf) << 0)
  82. #define FTSDC010_DCR_DATA_WRITE (1 << 4)
  83. #define FTSDC010_DCR_DMA_EN (1 << 5)
  84. #define FTSDC010_DCR_DATA_EN (1 << 6)
  85. #ifdef CONFIG_FTSDC010_SDIO
  86. #define FTSDC010_DCR_FIFOTH (1 << 7)
  87. #define FTSDC010_DCR_DMA_TYPE(x) (((x) & 0x3) << 8)
  88. #define FTSDC010_DCR_FIFO_RST (1 << 10)
  89. #endif /* CONFIG_FTSDC010_SDIO */
  90. #define FTSDC010_DCR_DMA_TYPE_1 0x0 /* Single r/w */
  91. #define FTSDC010_DCR_DMA_TYPE_4 0x1 /* Burst 4 r/w */
  92. #define FTSDC010_DCR_DMA_TYPE_8 0x2 /* Burst 8 r/w */
  93. #define FTSDC010_DCR_BLK_BYTES(x) (ffs(x) - 1) /* 1B - 2048B */
  94. /* CPRM related define */
  95. #define FTSDC010_CPRM_DATA_CHANGE_ENDIAN_EN 0x000008
  96. #define FTSDC010_CPRM_DATA_SWAP_HL_EN 0x000010
  97. /* 0x28 - status register */
  98. #define FTSDC010_STATUS_RSP_CRC_FAIL (1 << 0)
  99. #define FTSDC010_STATUS_DATA_CRC_FAIL (1 << 1)
  100. #define FTSDC010_STATUS_RSP_TIMEOUT (1 << 2)
  101. #define FTSDC010_STATUS_DATA_TIMEOUT (1 << 3)
  102. #define FTSDC010_STATUS_RSP_CRC_OK (1 << 4)
  103. #define FTSDC010_STATUS_DATA_CRC_OK (1 << 5)
  104. #define FTSDC010_STATUS_CMD_SEND (1 << 6)
  105. #define FTSDC010_STATUS_DATA_END (1 << 7)
  106. #define FTSDC010_STATUS_FIFO_URUN (1 << 8)
  107. #define FTSDC010_STATUS_FIFO_ORUN (1 << 9)
  108. #define FTSDC010_STATUS_CARD_CHANGE (1 << 10)
  109. #define FTSDC010_STATUS_CARD_DETECT (1 << 11)
  110. #define FTSDC010_STATUS_WRITE_PROT (1 << 12)
  111. #ifdef CONFIG_FTSDC010_SDIO
  112. #define FTSDC010_STATUS_CP_READY (1 << 13) /* reserved ? */
  113. #define FTSDC010_STATUS_CP_BUF_READY (1 << 14) /* reserved ? */
  114. #define FTSDC010_STATUS_PLAIN_TEXT_READY (1 << 15) /* reserved ? */
  115. #define FTSDC010_STATUS_SDIO_IRPT (1 << 16) /* SDIO card intr */
  116. #define FTSDC010_STATUS_DATA0_STATUS (1 << 17)
  117. #endif /* CONFIG_FTSDC010_SDIO */
  118. #define FTSDC010_STATUS_RSP_ERROR \
  119. (FTSDC010_STATUS_RSP_CRC_FAIL | FTSDC010_STATUS_RSP_TIMEOUT)
  120. #define FTSDC010_STATUS_RSP_MASK \
  121. (FTSDC010_STATUS_RSP_ERROR | FTSDC010_STATUS_RSP_CRC_OK)
  122. #define FTSDC010_STATUS_DATA_ERROR \
  123. (FTSDC010_STATUS_DATA_CRC_FAIL | FTSDC010_STATUS_DATA_TIMEOUT)
  124. #define FTSDC010_STATUS_DATA_MASK \
  125. (FTSDC010_STATUS_DATA_ERROR | FTSDC010_STATUS_DATA_CRC_OK \
  126. | FTSDC010_STATUS_DATA_END)
  127. /* 0x2c - clear register */
  128. #define FTSDC010_CLR_RSP_CRC_FAIL (1 << 0)
  129. #define FTSDC010_CLR_DATA_CRC_FAIL (1 << 1)
  130. #define FTSDC010_CLR_RSP_TIMEOUT (1 << 2)
  131. #define FTSDC010_CLR_DATA_TIMEOUT (1 << 3)
  132. #define FTSDC010_CLR_RSP_CRC_OK (1 << 4)
  133. #define FTSDC010_CLR_DATA_CRC_OK (1 << 5)
  134. #define FTSDC010_CLR_CMD_SEND (1 << 6)
  135. #define FTSDC010_CLR_DATA_END (1 << 7)
  136. #define FTSDC010_STATUS_FIFO_URUN (1 << 8) /* reserved ? */
  137. #define FTSDC010_STATUS_FIFO_ORUN (1 << 9) /* reserved ? */
  138. #define FTSDC010_CLR_CARD_CHANGE (1 << 10)
  139. #ifdef CONFIG_FTSDC010_SDIO
  140. #define FTSDC010_CLR_SDIO_IRPT (1 << 16)
  141. #endif /* CONFIG_FTSDC010_SDIO */
  142. /* 0x30 - interrupt mask register */
  143. #define FTSDC010_INT_MASK_RSP_CRC_FAIL (1 << 0)
  144. #define FTSDC010_INT_MASK_DATA_CRC_FAIL (1 << 1)
  145. #define FTSDC010_INT_MASK_RSP_TIMEOUT (1 << 2)
  146. #define FTSDC010_INT_MASK_DATA_TIMEOUT (1 << 3)
  147. #define FTSDC010_INT_MASK_RSP_CRC_OK (1 << 4)
  148. #define FTSDC010_INT_MASK_DATA_CRC_OK (1 << 5)
  149. #define FTSDC010_INT_MASK_CMD_SEND (1 << 6)
  150. #define FTSDC010_INT_MASK_DATA_END (1 << 7)
  151. #define FTSDC010_INT_MASK_FIFO_URUN (1 << 8)
  152. #define FTSDC010_INT_MASK_FIFO_ORUN (1 << 9)
  153. #define FTSDC010_INT_MASK_CARD_CHANGE (1 << 10)
  154. #ifdef CONFIG_FTSDC010_SDIO
  155. #define FTSDC010_INT_MASK_CP_READY (1 << 13)
  156. #define FTSDC010_INT_MASK_CP_BUF_READY (1 << 14)
  157. #define FTSDC010_INT_MASK_PLAIN_TEXT_READY (1 << 15)
  158. #define FTSDC010_INT_MASK_SDIO_IRPT (1 << 16)
  159. #define FTSDC010_STATUS_DATA0_STATUS (1 << 17)
  160. #endif /* CONFIG_FTSDC010_SDIO */
  161. /* ? */
  162. #define FTSDC010_CARD_INSERT 0x0
  163. #define FTSDC010_CARD_REMOVE FTSDC010_STATUS_REG_CARD_DETECT
  164. /* 0x34 - power control register */
  165. #define FTSDC010_PCR_POWER(x) (((x) & 0xf) << 0)
  166. #define FTSDC010_PCR_POWER_ON (1 << 4)
  167. /* 0x38 - clock control register */
  168. #define FTSDC010_CCR_CLK_DIV(x) (((x) & 0x7f) << 0)
  169. #define FTSDC010_CCR_CLK_SD (1 << 7) /* 0: MMC, 1: SD */
  170. #define FTSDC010_CCR_CLK_DIS (1 << 8)
  171. #define FTSDC010_CCR_CLK_HISPD (1 << 9) /* high speed */
  172. /* card type */
  173. #define FTSDC010_CARD_TYPE_SD FTSDC010_CLOCK_REG_CARD_TYPE
  174. #define FTSDC010_CARD_TYPE_MMC 0x0
  175. /* 0x3c - bus width register */
  176. #define FTSDC010_BWR_MODE_1BIT (1 << 0) /* 1 bit mode enabled */
  177. #define FTSDC010_BWR_MODE_8BIT (1 << 1) /* 8 bit mode enabled */
  178. #define FTSDC010_BWR_MODE_4BIT (1 << 2) /* 4 bit mode enabled */
  179. #define FTSDC010_BWR_MODE_MASK (7 << 0)
  180. #define FTSDC010_BWR_MODE_SHIFT (0)
  181. #define FTSDC010_BWR_CAPS_1BIT (0 << 3) /* 1 bits mode supported */
  182. #define FTSDC010_BWR_CAPS_4BIT (1 << 3) /* 1,4 bits mode supported */
  183. #define FTSDC010_BWR_CAPS_8BIT (2 << 3) /* 1,4,8 bits mode supported */
  184. #define FTSDC010_BWR_CAPS_MASK (3 << 3)
  185. #define FTSDC010_BWR_CAPS_SHIFT (3)
  186. #define FTSDC010_BWR_CARD_DETECT (1 << 5)
  187. /* 0x44 or 0x9c - feature register */
  188. #define FTSDC010_FEATURE_FIFO_DEPTH(x) (((x) >> 0) & 0xff)
  189. #define FTSDC010_FEATURE_CPRM_FUNCTION (1 << 8)
  190. #define FTSDC010_FIFO_DEPTH_4 0x04
  191. #define FTSDC010_FIFO_DEPTH_8 0x08
  192. #define FTSDC010_FIFO_DEPTH_16 0x10
  193. /* 0x48 or 0xa0 - revision register */
  194. #define FTSDC010_REV_REVISION(x) (((x) & 0xff) >> 0)
  195. #define FTSDC010_REV_MINOR(x) (((x) & 0xff00) >> 8)
  196. #define FTSDC010_REV_MAJOR(x) (((x) & 0xffff0000) >> 16)
  197. #ifdef CONFIG_FTSDC010_SDIO
  198. /* 0x44 - general purpose output */
  199. #define FTSDC010_GPO_PORT(x) (((x) & 0xf) << 0)
  200. /* 0x6c - sdio control register 1 */
  201. #define FTSDC010_SDIO_CTRL1_SDIO_BLK_SIZE(x) (((x) & 0xfff) << 0)
  202. #define FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE (1 << 12)
  203. #define FTSDC010_SDIO_CTRL1_READ_WAIT_EN (1 << 13)
  204. #define FTSDC010_SDIO_CTRL1_SDIO_ENABLE (1 << 14)
  205. #define FTSDC010_SDIO_CTRL1_SDIO_BLK_NO(x) (((x) & 0x1ff) << 15)
  206. /* 0x70 - sdio control register 2 */
  207. #define FTSDC010_SDIO_CTRL2_SUSP_READ_WAIT (1 << 0)
  208. #define FTSDC010_SDIO_CTRL2_SUSP_CMD_ABORT (1 << 1)
  209. /* 0x74 - sdio status register */
  210. #define FTSDC010_SDIO_STATUS_SDIO_BLK_CNT(x) (((x) >> 0) & 0x1ffff)
  211. #define FTSDC010_SDIO_STATUS_FIFO_REMAIN_NO(x) (((x) >> 17) & 0xef)
  212. #endif /* CONFIG_FTSDC010_SDIO */
  213. #endif /* __FTSDC010_H */