mt7629-reset.h 975 B

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2019 MediaTek Inc.
  4. */
  5. #ifndef _DT_BINDINGS_MTK_RESET_H_
  6. #define _DT_BINDINGS_MTK_RESET_H_
  7. /* PCIe/SATA Subsystem resets */
  8. #define MT7622_SATA_PHY_REG_RST 12
  9. #define MT7622_SATA_PHY_SW_RST 13
  10. #define MT7622_SATA_AXI_BUS_RST 15
  11. #define PCIE1_CORE_RST 19
  12. #define PCIE1_MMIO_RST 20
  13. #define PCIE1_HRST 21
  14. #define PCIE1_USER_RST 22
  15. #define PCIE1_PIPE_RST 23
  16. #define PCIE0_CORE_RST 27
  17. #define PCIE0_MMIO_RST 28
  18. #define PCIE0_HRST 29
  19. #define PCIE0_USER_RST 30
  20. #define PCIE0_PIPE_RST 31
  21. /* SSUSB Subsystem resets */
  22. #define SSUSB_PHY_PWR_RST 3
  23. #define SSUSB_MAC_PWR_RST 4
  24. /* ETH Subsystem resets */
  25. #define ETHSYS_SYS_RST 0
  26. #define ETHSYS_MCM_RST 2
  27. #define ETHSYS_HSDMA_RST 5
  28. #define ETHSYS_FE_RST 6
  29. #define ETHSYS_ESW_RST 16
  30. #define ETHSYS_GMAC_RST 23
  31. #define ETHSYS_EPHY_RST 24
  32. #define ETHSYS_CRYPTO_RST 29
  33. #define ETHSYS_PPE_RST 31
  34. #endif /* _DT_BINDINGS_MTK_RESET_H_ */