stm32h7-clks.h 3.2 KB

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  1. /* SYS, CORE AND BUS CLOCKS */
  2. #define SYS_D1CPRE 0
  3. #define HCLK 1
  4. #define PCLK1 2
  5. #define PCLK2 3
  6. #define PCLK3 4
  7. #define PCLK4 5
  8. #define HSI_DIV 6
  9. #define HSE_1M 7
  10. #define I2S_CKIN 8
  11. #define CK_DSI_PHY 9
  12. #define HSE_CK 10
  13. #define LSE_CK 11
  14. #define CSI_KER_DIV122 12
  15. #define RTC_CK 13
  16. #define CPU_SYSTICK 14
  17. /* OSCILLATOR BANK */
  18. #define OSC_BANK 18
  19. #define HSI_CK 18
  20. #define HSI_KER_CK 19
  21. #define CSI_CK 20
  22. #define CSI_KER_CK 21
  23. #define RC48_CK 22
  24. #define LSI_CK 23
  25. /* MCLOCK BANK */
  26. #define MCLK_BANK 28
  27. #define PER_CK 28
  28. #define PLLSRC 29
  29. #define SYS_CK 30
  30. #define TRACEIN_CK 31
  31. /* ODF BANK */
  32. #define ODF_BANK 32
  33. #define PLL1_P 32
  34. #define PLL1_Q 33
  35. #define PLL1_R 34
  36. #define PLL2_P 35
  37. #define PLL2_Q 36
  38. #define PLL2_R 37
  39. #define PLL3_P 38
  40. #define PLL3_Q 39
  41. #define PLL3_R 40
  42. /* MCO BANK */
  43. #define MCO_BANK 41
  44. #define MCO1 41
  45. #define MCO2 42
  46. /* PERIF BANK */
  47. #define PERIF_BANK 50
  48. #define D1SRAM1_CK 50
  49. #define ITCM_CK 51
  50. #define DTCM2_CK 52
  51. #define DTCM1_CK 53
  52. #define FLITF_CK 54
  53. #define JPGDEC_CK 55
  54. #define DMA2D_CK 56
  55. #define MDMA_CK 57
  56. #define USB2ULPI_CK 58
  57. #define USB1ULPI_CK 59
  58. #define ETH1RX_CK 60
  59. #define ETH1TX_CK 61
  60. #define ETH1MAC_CK 62
  61. #define ART_CK 63
  62. #define DMA2_CK 64
  63. #define DMA1_CK 65
  64. #define D2SRAM3_CK 66
  65. #define D2SRAM2_CK 67
  66. #define D2SRAM1_CK 68
  67. #define HASH_CK 69
  68. #define CRYPT_CK 70
  69. #define CAMITF_CK 71
  70. #define BKPRAM_CK 72
  71. #define HSEM_CK 73
  72. #define BDMA_CK 74
  73. #define CRC_CK 75
  74. #define GPIOK_CK 76
  75. #define GPIOJ_CK 77
  76. #define GPIOI_CK 78
  77. #define GPIOH_CK 79
  78. #define GPIOG_CK 80
  79. #define GPIOF_CK 81
  80. #define GPIOE_CK 82
  81. #define GPIOD_CK 83
  82. #define GPIOC_CK 84
  83. #define GPIOB_CK 85
  84. #define GPIOA_CK 86
  85. #define WWDG1_CK 87
  86. #define DAC12_CK 88
  87. #define WWDG2_CK 89
  88. #define TIM14_CK 90
  89. #define TIM13_CK 91
  90. #define TIM12_CK 92
  91. #define TIM7_CK 93
  92. #define TIM6_CK 94
  93. #define TIM5_CK 95
  94. #define TIM4_CK 96
  95. #define TIM3_CK 97
  96. #define TIM2_CK 98
  97. #define MDIOS_CK 99
  98. #define OPAMP_CK 100
  99. #define CRS_CK 101
  100. #define TIM17_CK 102
  101. #define TIM16_CK 103
  102. #define TIM15_CK 104
  103. #define TIM8_CK 105
  104. #define TIM1_CK 106
  105. #define TMPSENS_CK 107
  106. #define RTCAPB_CK 108
  107. #define VREF_CK 109
  108. #define COMP12_CK 110
  109. #define SYSCFG_CK 111
  110. /* must be equal to last peripheral clock index */
  111. #define LAST_PERIF_BANK SYSCFG_CK
  112. /* KERNEL BANK */
  113. #define KERN_BANK 120
  114. #define SDMMC1_CK 120
  115. #define QUADSPI_CK 121
  116. #define FMC_CK 122
  117. #define USB2OTG_CK 123
  118. #define USB1OTG_CK 124
  119. #define ADC12_CK 125
  120. #define SDMMC2_CK 126
  121. #define RNG_CK 127
  122. #define ADC3_CK 128
  123. #define DSI_CK 129
  124. #define LTDC_CK 130
  125. #define USART8_CK 131
  126. #define USART7_CK 132
  127. #define HDMICEC_CK 133
  128. #define I2C3_CK 134
  129. #define I2C2_CK 135
  130. #define I2C1_CK 136
  131. #define UART5_CK 137
  132. #define UART4_CK 138
  133. #define USART3_CK 139
  134. #define USART2_CK 140
  135. #define SPDIFRX_CK 141
  136. #define SPI3_CK 142
  137. #define SPI2_CK 143
  138. #define LPTIM1_CK 144
  139. #define FDCAN_CK 145
  140. #define SWP_CK 146
  141. #define HRTIM_CK 147
  142. #define DFSDM1_CK 148
  143. #define SAI3_CK 149
  144. #define SAI2_CK 150
  145. #define SAI1_CK 151
  146. #define SPI5_CK 152
  147. #define SPI4_CK 153
  148. #define SPI1_CK 154
  149. #define USART6_CK 155
  150. #define USART1_CK 156
  151. #define SAI4B_CK 157
  152. #define SAI4A_CK 158
  153. #define LPTIM5_CK 159
  154. #define LPTIM4_CK 160
  155. #define LPTIM3_CK 161
  156. #define LPTIM2_CK 162
  157. #define I2C4_CK 163
  158. #define SPI6_CK 164
  159. #define LPUART1_CK 165
  160. #define STM32H7_MAX_CLKS 166