r8a7795-cpg-mssr.h 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+
  2. *
  3. * Copyright (C) 2015 Renesas Electronics Corp.
  4. */
  5. #ifndef __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
  6. #define __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
  7. #include <dt-bindings/clock/renesas-cpg-mssr.h>
  8. /* r8a7795 CPG Core Clocks */
  9. #define R8A7795_CLK_Z 0
  10. #define R8A7795_CLK_Z2 1
  11. #define R8A7795_CLK_ZR 2
  12. #define R8A7795_CLK_ZG 3
  13. #define R8A7795_CLK_ZTR 4
  14. #define R8A7795_CLK_ZTRD2 5
  15. #define R8A7795_CLK_ZT 6
  16. #define R8A7795_CLK_ZX 7
  17. #define R8A7795_CLK_S0D1 8
  18. #define R8A7795_CLK_S0D4 9
  19. #define R8A7795_CLK_S1D1 10
  20. #define R8A7795_CLK_S1D2 11
  21. #define R8A7795_CLK_S1D4 12
  22. #define R8A7795_CLK_S2D1 13
  23. #define R8A7795_CLK_S2D2 14
  24. #define R8A7795_CLK_S2D4 15
  25. #define R8A7795_CLK_S3D1 16
  26. #define R8A7795_CLK_S3D2 17
  27. #define R8A7795_CLK_S3D4 18
  28. #define R8A7795_CLK_LB 19
  29. #define R8A7795_CLK_CL 20
  30. #define R8A7795_CLK_ZB3 21
  31. #define R8A7795_CLK_ZB3D2 22
  32. #define R8A7795_CLK_CR 23
  33. #define R8A7795_CLK_CRD2 24
  34. #define R8A7795_CLK_SD0H 25
  35. #define R8A7795_CLK_SD0 26
  36. #define R8A7795_CLK_SD1H 27
  37. #define R8A7795_CLK_SD1 28
  38. #define R8A7795_CLK_SD2H 29
  39. #define R8A7795_CLK_SD2 30
  40. #define R8A7795_CLK_SD3H 31
  41. #define R8A7795_CLK_SD3 32
  42. #define R8A7795_CLK_SSP2 33
  43. #define R8A7795_CLK_SSP1 34
  44. #define R8A7795_CLK_SSPRS 35
  45. #define R8A7795_CLK_RPC 36
  46. #define R8A7795_CLK_RPCD2 37
  47. #define R8A7795_CLK_MSO 38
  48. #define R8A7795_CLK_CANFD 39
  49. #define R8A7795_CLK_HDMI 40
  50. #define R8A7795_CLK_CSI0 41
  51. /* CLK_CSIREF was removed */
  52. #define R8A7795_CLK_CP 43
  53. #define R8A7795_CLK_CPEX 44
  54. #define R8A7795_CLK_R 45
  55. #define R8A7795_CLK_OSC 46
  56. /* r8a7795 ES2.0 CPG Core Clocks */
  57. #define R8A7795_CLK_S0D2 47
  58. #define R8A7795_CLK_S0D3 48
  59. #define R8A7795_CLK_S0D6 49
  60. #define R8A7795_CLK_S0D8 50
  61. #define R8A7795_CLK_S0D12 51
  62. #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */