r8a7793-clock.h 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0
  2. *
  3. * r8a7793 clock definition
  4. *
  5. * Copyright (C) 2014 Renesas Electronics Corporation
  6. */
  7. #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
  8. #define __DT_BINDINGS_CLOCK_R8A7793_H__
  9. /* CPG */
  10. #define R8A7793_CLK_MAIN 0
  11. #define R8A7793_CLK_PLL0 1
  12. #define R8A7793_CLK_PLL1 2
  13. #define R8A7793_CLK_PLL3 3
  14. #define R8A7793_CLK_LB 4
  15. #define R8A7793_CLK_QSPI 5
  16. #define R8A7793_CLK_SDH 6
  17. #define R8A7793_CLK_SD0 7
  18. #define R8A7793_CLK_Z 8
  19. #define R8A7793_CLK_RCAN 9
  20. #define R8A7793_CLK_ADSP 10
  21. /* MSTP0 */
  22. #define R8A7793_CLK_MSIOF0 0
  23. /* MSTP1 */
  24. #define R8A7793_CLK_VCP0 1
  25. #define R8A7793_CLK_VPC0 3
  26. #define R8A7793_CLK_SSP1 9
  27. #define R8A7793_CLK_TMU1 11
  28. #define R8A7793_CLK_3DG 12
  29. #define R8A7793_CLK_2DDMAC 15
  30. #define R8A7793_CLK_FDP1_1 18
  31. #define R8A7793_CLK_FDP1_0 19
  32. #define R8A7793_CLK_TMU3 21
  33. #define R8A7793_CLK_TMU2 22
  34. #define R8A7793_CLK_CMT0 24
  35. #define R8A7793_CLK_TMU0 25
  36. #define R8A7793_CLK_VSP1_DU1 27
  37. #define R8A7793_CLK_VSP1_DU0 28
  38. #define R8A7793_CLK_VSP1_S 31
  39. /* MSTP2 */
  40. #define R8A7793_CLK_SCIFA2 2
  41. #define R8A7793_CLK_SCIFA1 3
  42. #define R8A7793_CLK_SCIFA0 4
  43. #define R8A7793_CLK_MSIOF2 5
  44. #define R8A7793_CLK_SCIFB0 6
  45. #define R8A7793_CLK_SCIFB1 7
  46. #define R8A7793_CLK_MSIOF1 8
  47. #define R8A7793_CLK_SCIFB2 16
  48. #define R8A7793_CLK_SYS_DMAC1 18
  49. #define R8A7793_CLK_SYS_DMAC0 19
  50. /* MSTP3 */
  51. #define R8A7793_CLK_TPU0 4
  52. #define R8A7793_CLK_SDHI2 11
  53. #define R8A7793_CLK_SDHI1 12
  54. #define R8A7793_CLK_SDHI0 14
  55. #define R8A7793_CLK_MMCIF0 15
  56. #define R8A7793_CLK_IIC0 18
  57. #define R8A7793_CLK_PCIEC 19
  58. #define R8A7793_CLK_IIC1 23
  59. #define R8A7793_CLK_SSUSB 28
  60. #define R8A7793_CLK_CMT1 29
  61. #define R8A7793_CLK_USBDMAC0 30
  62. #define R8A7793_CLK_USBDMAC1 31
  63. /* MSTP4 */
  64. #define R8A7793_CLK_IRQC 7
  65. #define R8A7793_CLK_INTC_SYS 8
  66. /* MSTP5 */
  67. #define R8A7793_CLK_AUDIO_DMAC1 1
  68. #define R8A7793_CLK_AUDIO_DMAC0 2
  69. #define R8A7793_CLK_ADSP_MOD 6
  70. #define R8A7793_CLK_THERMAL 22
  71. #define R8A7793_CLK_PWM 23
  72. /* MSTP7 */
  73. #define R8A7793_CLK_EHCI 3
  74. #define R8A7793_CLK_HSUSB 4
  75. #define R8A7793_CLK_HSCIF2 13
  76. #define R8A7793_CLK_SCIF5 14
  77. #define R8A7793_CLK_SCIF4 15
  78. #define R8A7793_CLK_HSCIF1 16
  79. #define R8A7793_CLK_HSCIF0 17
  80. #define R8A7793_CLK_SCIF3 18
  81. #define R8A7793_CLK_SCIF2 19
  82. #define R8A7793_CLK_SCIF1 20
  83. #define R8A7793_CLK_SCIF0 21
  84. #define R8A7793_CLK_DU1 23
  85. #define R8A7793_CLK_DU0 24
  86. #define R8A7793_CLK_LVDS0 26
  87. /* MSTP8 */
  88. #define R8A7793_CLK_IPMMU_SGX 0
  89. #define R8A7793_CLK_VIN2 9
  90. #define R8A7793_CLK_VIN1 10
  91. #define R8A7793_CLK_VIN0 11
  92. #define R8A7793_CLK_ETHER 13
  93. #define R8A7793_CLK_SATA1 14
  94. #define R8A7793_CLK_SATA0 15
  95. /* MSTP9 */
  96. #define R8A7793_CLK_GPIO7 4
  97. #define R8A7793_CLK_GPIO6 5
  98. #define R8A7793_CLK_GPIO5 7
  99. #define R8A7793_CLK_GPIO4 8
  100. #define R8A7793_CLK_GPIO3 9
  101. #define R8A7793_CLK_GPIO2 10
  102. #define R8A7793_CLK_GPIO1 11
  103. #define R8A7793_CLK_GPIO0 12
  104. #define R8A7793_CLK_RCAN1 15
  105. #define R8A7793_CLK_RCAN0 16
  106. #define R8A7793_CLK_QSPI_MOD 17
  107. #define R8A7793_CLK_I2C5 25
  108. #define R8A7793_CLK_IICDVFS 26
  109. #define R8A7793_CLK_I2C4 27
  110. #define R8A7793_CLK_I2C3 28
  111. #define R8A7793_CLK_I2C2 29
  112. #define R8A7793_CLK_I2C1 30
  113. #define R8A7793_CLK_I2C0 31
  114. /* MSTP10 */
  115. #define R8A7793_CLK_SSI_ALL 5
  116. #define R8A7793_CLK_SSI9 6
  117. #define R8A7793_CLK_SSI8 7
  118. #define R8A7793_CLK_SSI7 8
  119. #define R8A7793_CLK_SSI6 9
  120. #define R8A7793_CLK_SSI5 10
  121. #define R8A7793_CLK_SSI4 11
  122. #define R8A7793_CLK_SSI3 12
  123. #define R8A7793_CLK_SSI2 13
  124. #define R8A7793_CLK_SSI1 14
  125. #define R8A7793_CLK_SSI0 15
  126. #define R8A7793_CLK_SCU_ALL 17
  127. #define R8A7793_CLK_SCU_DVC1 18
  128. #define R8A7793_CLK_SCU_DVC0 19
  129. #define R8A7793_CLK_SCU_CTU1_MIX1 20
  130. #define R8A7793_CLK_SCU_CTU0_MIX0 21
  131. #define R8A7793_CLK_SCU_SRC9 22
  132. #define R8A7793_CLK_SCU_SRC8 23
  133. #define R8A7793_CLK_SCU_SRC7 24
  134. #define R8A7793_CLK_SCU_SRC6 25
  135. #define R8A7793_CLK_SCU_SRC5 26
  136. #define R8A7793_CLK_SCU_SRC4 27
  137. #define R8A7793_CLK_SCU_SRC3 28
  138. #define R8A7793_CLK_SCU_SRC2 29
  139. #define R8A7793_CLK_SCU_SRC1 30
  140. #define R8A7793_CLK_SCU_SRC0 31
  141. /* MSTP11 */
  142. #define R8A7793_CLK_SCIFA3 6
  143. #define R8A7793_CLK_SCIFA4 7
  144. #define R8A7793_CLK_SCIFA5 8
  145. #endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */