cpsw.h 2.4 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485
  1. /*
  2. * CPSW Ethernet Switch Driver
  3. *
  4. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #ifndef _CPSW_H_
  16. #define _CPSW_H_
  17. #include <dm/ofnode.h>
  18. /* reg offset */
  19. #define CPSW_HOST_PORT_OFFSET 0x108
  20. #define CPSW_SLAVE0_OFFSET 0x208
  21. #define CPSW_SLAVE1_OFFSET 0x308
  22. #define CPSW_SLAVE_SIZE 0x100
  23. #define CPSW_CPDMA_OFFSET 0x800
  24. #define CPSW_HW_STATS 0x900
  25. #define CPSW_STATERAM_OFFSET 0xa00
  26. #define CPSW_CPTS_OFFSET 0xc00
  27. #define CPSW_ALE_OFFSET 0xd00
  28. #define CPSW_SLIVER0_OFFSET 0xd80
  29. #define CPSW_SLIVER1_OFFSET 0xdc0
  30. #define CPSW_BD_OFFSET 0x2000
  31. #define CPSW_MDIO_DIV 0xff
  32. #define AM335X_GMII_SEL_OFFSET 0x630
  33. struct cpsw_slave_data {
  34. u32 slave_reg_ofs;
  35. u32 sliver_reg_ofs;
  36. int phy_addr;
  37. int phy_if;
  38. ofnode phy_of_handle;
  39. int max_speed;
  40. };
  41. enum {
  42. CPSW_CTRL_VERSION_1 = 0,
  43. CPSW_CTRL_VERSION_2 /* am33xx like devices */
  44. };
  45. struct cpsw_platform_data {
  46. u32 mdio_base;
  47. u32 cpsw_base;
  48. u32 mac_id;
  49. u32 gmii_sel;
  50. int mdio_div;
  51. int channels; /* number of cpdma channels (symmetric) */
  52. u32 cpdma_reg_ofs; /* cpdma register offset */
  53. int slaves; /* number of slave cpgmac ports */
  54. u32 ale_reg_ofs; /* address lookup engine reg offset */
  55. int ale_entries; /* ale table size */
  56. u32 host_port_reg_ofs; /* cpdma host port registers */
  57. u32 hw_stats_reg_ofs; /* cpsw hw stats counters */
  58. u32 bd_ram_ofs; /* Buffer Descriptor RAM offset */
  59. u32 mac_control;
  60. struct cpsw_slave_data *slave_data;
  61. void (*control)(int enabled);
  62. u32 host_port_num;
  63. u32 active_slave;
  64. bool rmii_clock_external;
  65. u8 version;
  66. const char *phy_sel_compat;
  67. u32 syscon_addr;
  68. const char *macid_sel_compat;
  69. };
  70. int cpsw_register(struct cpsw_platform_data *data);
  71. int ti_cm_get_macid_addr(struct udevice *dev, int slave,
  72. struct cpsw_platform_data *data);
  73. void ti_cm_get_macid(struct udevice *dev, struct cpsw_platform_data *data,
  74. u8 *mac_addr);
  75. int cpsw_get_slave_phy_addr(struct udevice *dev, int slave);
  76. #endif /* _CPSW_H_ */