wb50n.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the WB50N CPU Module.
  4. */
  5. #ifndef __CONFIG_H
  6. #define __CONFIG_H
  7. #include <asm/hardware.h>
  8. /* ARM asynchronous clock */
  9. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  10. #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  11. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  12. #define CONFIG_SETUP_MEMORY_TAGS
  13. #define CONFIG_INITRD_TAG
  14. #ifndef CONFIG_SPL_BUILD
  15. #define CONFIG_SKIP_LOWLEVEL_INIT
  16. #endif
  17. /* serial console */
  18. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  19. #define CONFIG_USART_ID ATMEL_ID_DBGU
  20. /*
  21. * BOOTP options
  22. */
  23. #define CONFIG_BOOTP_BOOTFILESIZE
  24. /* SDRAM */
  25. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
  26. #define CONFIG_SYS_SDRAM_SIZE 0x04000000
  27. #ifdef CONFIG_SPL_BUILD
  28. #define CONFIG_SYS_INIT_SP_ADDR 0x310000
  29. #else
  30. #define CONFIG_SYS_INIT_SP_ADDR \
  31. (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  32. #endif
  33. /* NAND flash */
  34. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  35. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  36. /* our ALE is AD21 */
  37. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  38. /* our CLE is AD22 */
  39. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  40. #define CONFIG_SYS_NAND_ONFI_DETECTION
  41. /* Ethernet Hardware */
  42. #define CONFIG_MACB
  43. #define CONFIG_RMII
  44. #define CONFIG_NET_RETRY_COUNT 20
  45. #define CONFIG_MACB_SEARCH_PHY
  46. #define CONFIG_RGMII
  47. #define CONFIG_ETHADDR C0:EE:40:00:00:00
  48. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  49. #define CONFIG_EXTRA_ENV_SETTINGS \
  50. "autoload=no\0" \
  51. "autostart=no\0"
  52. /* bootstrap + u-boot + env in nandflash */
  53. #define CONFIG_BOOTCOMMAND \
  54. "nand read 0x22000000 0x000e0000 0x500000; " \
  55. "bootm"
  56. #define CONFIG_SYS_CBSIZE 1024
  57. #define CONFIG_SYS_MAXARGS 16
  58. #define CONFIG_SYS_PBSIZE \
  59. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  60. /* Size of malloc() pool */
  61. #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
  62. /* SPL */
  63. #define CONFIG_SPL_MAX_SIZE 0x10000
  64. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  65. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  66. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  67. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  68. #define CONFIG_SYS_MONITOR_LEN (512 << 10)
  69. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  70. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  71. #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  72. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  73. #define CONFIG_SYS_NAND_OOBSIZE 64
  74. #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  75. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  76. #endif