verdin-imx8mm.h 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2020 Toradex
  4. */
  5. #ifndef __VERDIN_IMX8MM_H
  6. #define __VERDIN_IMX8MM_H
  7. #include <asm/arch/imx-regs.h>
  8. #include <linux/sizes.h>
  9. #define CONFIG_SPL_MAX_SIZE (148 * 1024)
  10. #define CONFIG_SYS_MONITOR_LEN SZ_512K
  11. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  12. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  13. #define CONFIG_SYS_UBOOT_BASE \
  14. (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  15. #ifdef CONFIG_SPL_BUILD
  16. #define CONFIG_SPL_STACK 0x920000
  17. #define CONFIG_SPL_BSS_START_ADDR 0x910000
  18. #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
  19. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  20. #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
  21. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  22. #define CONFIG_MALLOC_F_ADDR 0x930000
  23. /* For RAW image gives a error info not panic */
  24. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  25. #endif
  26. #define MEM_LAYOUT_ENV_SETTINGS \
  27. "fdt_addr_r=0x44000000\0" \
  28. "kernel_addr_r=0x42000000\0" \
  29. "ramdisk_addr_r=0x46400000\0" \
  30. "scriptaddr=0x46000000\0"
  31. #define CONFIG_LOADADDR 0x40480000
  32. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  33. /* Enable Distro Boot */
  34. #ifndef CONFIG_SPL_BUILD
  35. #define BOOT_TARGET_DEVICES(func) \
  36. func(MMC, mmc, 1) \
  37. func(MMC, mmc, 0) \
  38. func(DHCP, dhcp, na)
  39. #include <config_distro_bootcmd.h>
  40. #undef CONFIG_ISO_PARTITION
  41. #else
  42. #define BOOTENV
  43. #endif
  44. /* Initial environment variables */
  45. #define CONFIG_EXTRA_ENV_SETTINGS \
  46. BOOTENV \
  47. MEM_LAYOUT_ENV_SETTINGS \
  48. "bootcmd_mfg=fastboot 0\0" \
  49. "console=ttymxc0\0" \
  50. "fdt_addr=0x43000000\0" \
  51. "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  52. "initrd_addr=0x43800000\0" \
  53. "initrd_high=0xffffffffffffffff\0" \
  54. "kernel_image=Image\0" \
  55. "netargs=setenv bootargs console=${console},${baudrate} " \
  56. "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
  57. "\0" \
  58. "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \
  59. "tftp ${fdt_addr} verdin/${fdtfile}; " \
  60. "booti ${loadaddr} - ${fdt_addr}\0" \
  61. "setup=setenv setupargs console=${console},${baudrate} " \
  62. "console=tty1 consoleblank=0 earlycon\0" \
  63. "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
  64. "if test \"$confirm\" = \"y\"; then " \
  65. "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
  66. "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
  67. "${blkcnt}; fi\0"
  68. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  69. #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
  70. #define CONFIG_SYS_INIT_SP_OFFSET \
  71. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  72. #define CONFIG_SYS_INIT_SP_ADDR \
  73. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  74. #if defined(CONFIG_ENV_IS_IN_MMC)
  75. /* Environment in eMMC, before config block at the end of 1st "boot sector" */
  76. #endif
  77. /* Size of malloc() pool */
  78. #define CONFIG_SYS_MALLOC_LEN SZ_32M
  79. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  80. /* SDRAM configuration */
  81. #define PHYS_SDRAM 0x40000000
  82. #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
  83. /* UART */
  84. #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
  85. /* Monitor Command Prompt */
  86. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  87. #define CONFIG_SYS_CBSIZE SZ_2K
  88. #define CONFIG_SYS_MAXARGS 64
  89. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  90. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  91. sizeof(CONFIG_SYS_PROMPT) + 16)
  92. /* USDHC */
  93. #define CONFIG_FSL_USDHC
  94. #define CONFIG_SYS_FSL_USDHC_NUM 2
  95. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  96. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  97. #define CONFIG_SYS_I2C_SPEED 100000
  98. /* ENET */
  99. #define CONFIG_ETHPRIME "FEC"
  100. #define CONFIG_FEC_XCV_TYPE RGMII
  101. #define CONFIG_FEC_MXC_PHYADDR 7
  102. #define FEC_QUIRK_ENET_MAC
  103. #define IMX_FEC_BASE 0x30BE0000
  104. #endif /*_VERDIN_IMX8MM_H */