vcoreiii.h 2.1 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
  2. /*
  3. * Copyright (c) 2018 Microsemi Corporation
  4. */
  5. #ifndef __VCOREIII_H
  6. #define __VCOREIII_H
  7. #include <linux/sizes.h>
  8. /* Onboard devices */
  9. #define CONFIG_SYS_MALLOC_LEN 0x1F0000
  10. #define CONFIG_SYS_LOAD_ADDR 0x00100000
  11. #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
  12. #if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
  13. #define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
  14. #define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
  15. #else
  16. #define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
  17. #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
  18. #endif
  19. #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
  20. #define CONFIG_SYS_SDRAM_BASE 0x80000000
  21. #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
  22. #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
  23. #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
  24. #define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M)
  25. #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
  26. #define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M)
  27. #else
  28. #error Unknown DDR size - please add!
  29. #endif
  30. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  31. #if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
  32. #define VCOREIII_DEFAULT_MTD_ENV \
  33. "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
  34. "mtdids="CONFIG_MTDIDS_DEFAULT"\0"
  35. #else
  36. #define VCOREIII_DEFAULT_MTD_ENV /* Go away */
  37. #endif
  38. #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
  39. #define CONFIG_EXTRA_ENV_SETTINGS \
  40. VCOREIII_DEFAULT_MTD_ENV \
  41. "loadaddr=0x81000000\0" \
  42. "spi_image_off=0x00100000\0" \
  43. "console=ttyS0,115200\0" \
  44. "setup=setenv bootargs console=${console} ${mtdparts}" \
  45. "${bootargs_extra}\0" \
  46. "spiboot=run setup; sf probe; sf read ${loadaddr}" \
  47. "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \
  48. "ubootfile=u-boot.bin\0" \
  49. "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \
  50. "sf erase UBoot 0x100000;" \
  51. "sf write ${loadaddr} UBoot ${filesize}\0" \
  52. "bootcmd=run spiboot\0" \
  53. ""
  54. #endif /* __VCOREIII_H */