ti_omap5_common.h 2.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2013
  4. * Texas Instruments Incorporated.
  5. * Sricharan R <r.sricharan@ti.com>
  6. *
  7. * Derived from OMAP4 done by:
  8. * Aneesh V <aneesh@ti.com>
  9. *
  10. * TI OMAP5 AND DRA7XX common configuration settings
  11. *
  12. * For more details, please see the technical documents listed at
  13. * http://www.ti.com/product/omap5432
  14. */
  15. #ifndef __CONFIG_TI_OMAP5_COMMON_H
  16. #define __CONFIG_TI_OMAP5_COMMON_H
  17. /* Use General purpose timer 1 */
  18. #define CONFIG_SYS_TIMERBASE GPT2_BASE
  19. /*
  20. * For the DDR timing information we can either dynamically determine
  21. * the timings to use or use pre-determined timings (based on using the
  22. * dynamic method. Default to the static timing infomation.
  23. */
  24. #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
  25. #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
  26. #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
  27. #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
  28. #endif
  29. #define CONFIG_PALMAS_POWER
  30. #include <asm/arch/cpu.h>
  31. #include <asm/arch/omap.h>
  32. #include <configs/ti_armv7_omap.h>
  33. /*
  34. * Hardware drivers
  35. */
  36. #define CONFIG_SYS_NS16550_CLK 48000000
  37. #if !defined(CONFIG_DM_SERIAL)
  38. #define CONFIG_SYS_NS16550_SERIAL
  39. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  40. #endif
  41. /*
  42. * Environment setup
  43. */
  44. #ifndef DFUARGS
  45. #define DFUARGS
  46. #endif
  47. #include <environment/ti/boot.h>
  48. #include <environment/ti/mmc.h>
  49. #include <environment/ti/nand.h>
  50. #define CONFIG_EXTRA_ENV_SETTINGS \
  51. DEFAULT_LINUX_BOOT_ENV \
  52. DEFAULT_MMC_TI_ARGS \
  53. DEFAULT_FIT_TI_ARGS \
  54. DEFAULT_COMMON_BOOT_TI_ARGS \
  55. DEFAULT_FDT_TI_ARGS \
  56. DFUARGS \
  57. NETARGS \
  58. NANDARGS \
  59. /*
  60. * SPL related defines. The Public RAM memory map the ROM defines the
  61. * area between 0x40300000 and 0x4031E000 as a download area for OMAP5.
  62. * On DRA7xx/AM57XX the download area is between 0x40300000 and 0x4037E000.
  63. * We set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
  64. * print some information.
  65. */
  66. #ifdef CONFIG_TI_SECURE_DEVICE
  67. /*
  68. * For memory booting on HS parts, the first 4KB of the internal RAM is
  69. * reserved for secure world use and the flash loader image is
  70. * preceded by a secure certificate. The SPL will therefore run in internal
  71. * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)).
  72. */
  73. #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000
  74. /* If no specific start address is specified then the secure EMIF
  75. * region will be placed at the end of the DDR space. In order to prevent
  76. * the main u-boot relocation from clobbering that memory and causing a
  77. * firewall violation, we tell u-boot that memory is protected RAM (PRAM)
  78. */
  79. #if (CONFIG_TI_SECURE_EMIF_REGION_START == 0)
  80. #define CONFIG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10
  81. #endif
  82. #else
  83. /*
  84. * For all booting on GP parts, the flash loader image is
  85. * downloaded into internal RAM at address 0x40300000.
  86. */
  87. #endif
  88. #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
  89. (128 << 20))
  90. #ifdef CONFIG_SPL_BUILD
  91. #undef CONFIG_TIMER
  92. #endif
  93. #endif /* __CONFIG_TI_OMAP5_COMMON_H */