tegra186-common.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright 2013-2016, NVIDIA CORPORATION.
  4. */
  5. #ifndef _TEGRA186_COMMON_H_
  6. #define _TEGRA186_COMMON_H_
  7. #include "tegra-common.h"
  8. /*
  9. * NS16550 Configuration
  10. */
  11. #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
  12. /*-----------------------------------------------------------------------
  13. * Physical Memory Map
  14. */
  15. /* Generic Interrupt Controller */
  16. #define CONFIG_GICV2
  17. #undef FDTFILE
  18. #define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
  19. "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
  20. "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \
  21. "fi; "
  22. /*
  23. * Memory layout for where various images get loaded by boot scripts:
  24. *
  25. * scriptaddr can be pretty much anywhere that doesn't conflict with something
  26. * else. Put it above BOOTMAPSZ to eliminate conflicts.
  27. *
  28. * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
  29. * something else. Put it above BOOTMAPSZ to eliminate conflicts.
  30. *
  31. * kernel_addr_r must be within the first 128M of RAM in order for the
  32. * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
  33. * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
  34. * should not overlap that area, or the kernel will have to copy itself
  35. * somewhere else before decompression. Similarly, the address of any other
  36. * data passed to the kernel shouldn't overlap the start of RAM. Pushing
  37. * this up to 16M allows for a sizable kernel to be decompressed below the
  38. * compressed load address.
  39. *
  40. * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
  41. * the compressed kernel to be up to 16M too.
  42. *
  43. * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
  44. * for the FDT/DTB to be up to 1M, which is hopefully plenty.
  45. */
  46. #define CONFIG_LOADADDR 0x80080000
  47. #define MEM_LAYOUT_ENV_SETTINGS \
  48. "scriptaddr=0x90000000\0" \
  49. "pxefile_addr_r=0x90100000\0" \
  50. "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
  51. "fdt_addr_r=0x82000000\0" \
  52. "ramdisk_addr_r=0x82100000\0"
  53. #endif