smartweb.h 6.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. *
  7. * (C) Copyright 2010
  8. * Achim Ehrlich <aehrlich@taskit.de>
  9. * taskit GmbH <www.taskit.de>
  10. *
  11. * (C) Copyright 2012
  12. * Markus Hubig <mhubig@imko.de>
  13. * IMKO GmbH <www.imko.de>
  14. *
  15. * (C) Copyright 2014
  16. * Heiko Schocher <hs@denx.de>
  17. * DENX Software Engineering GmbH
  18. *
  19. * Configuation settings for the smartweb.
  20. */
  21. #ifndef __CONFIG_H
  22. #define __CONFIG_H
  23. /*
  24. * SoC must be defined first, before hardware.h is included.
  25. * In this case SoC is defined in boards.cfg.
  26. */
  27. #include <asm/hardware.h>
  28. #include <linux/sizes.h>
  29. /*
  30. * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
  31. * program. Since the linker has to swallow that define, we must use a pure
  32. * hex number here!
  33. */
  34. /* ARM asynchronous clock */
  35. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  36. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
  37. /* misc settings */
  38. #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
  39. #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
  40. #define CONFIG_INITRD_TAG /* pass initrd param to kernel */
  41. #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */
  42. /* We set the max number of command args high to avoid HUSH bugs. */
  43. #define CONFIG_SYS_MAXARGS 32
  44. /* setting board specific options */
  45. #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
  46. #define CONFIG_SYS_AUTOLOAD "yes"
  47. #define CONFIG_RESET_TO_RETRY
  48. /* The LED PINs */
  49. #define CONFIG_RED_LED AT91_PIN_PA9
  50. #define CONFIG_GREEN_LED AT91_PIN_PA6
  51. /*
  52. * SDRAM: 1 bank, 64 MB, base address 0x20000000
  53. * Already initialized before u-boot gets started.
  54. */
  55. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
  56. #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
  57. /*
  58. * Perform a SDRAM Memtest from the start of SDRAM
  59. * till the beginning of the U-Boot position in RAM.
  60. */
  61. /* Size of malloc() pool */
  62. #define CONFIG_SYS_MALLOC_LEN \
  63. ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
  64. /* NAND flash settings */
  65. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  66. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  67. #define CONFIG_SYS_NAND_DBW_8
  68. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  69. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  70. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  71. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
  72. /* general purpose I/O */
  73. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  74. #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
  75. /* serial console */
  76. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  77. #define CONFIG_USART_ID ATMEL_ID_SYS
  78. /*
  79. * Ethernet configuration
  80. *
  81. */
  82. #define CONFIG_MACB
  83. #define CONFIG_RMII /* use reduced MII inteface */
  84. #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
  85. #define CONFIG_AT91_WANTS_COMMON_PHY
  86. /* BOOTP and DHCP options */
  87. #define CONFIG_BOOTP_BOOTFILESIZE
  88. #define CONFIG_NFSBOOTCOMMAND \
  89. "setenv autoload yes; setenv autoboot yes; " \
  90. "setenv bootargs ${basicargs} ${mtdparts} " \
  91. "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
  92. "dhcp"
  93. #if !defined(CONFIG_SPL_BUILD)
  94. /* USB configuration */
  95. #define CONFIG_USB_ATMEL
  96. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  97. #define CONFIG_USB_OHCI_NEW
  98. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  99. #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
  100. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
  101. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  102. /* USB DFU support */
  103. #define CONFIG_USB_GADGET_AT91
  104. /* DFU class support */
  105. #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M
  106. #define DFU_MANIFEST_POLL_TIMEOUT 25000
  107. #endif
  108. /* General Boot Parameter */
  109. #define CONFIG_BOOTCOMMAND "run flashboot"
  110. #define CONFIG_SYS_CBSIZE 512
  111. /*
  112. * RAM Memory address where to put the
  113. * Linux Kernel befor starting.
  114. */
  115. #define CONFIG_SYS_LOAD_ADDR 0x22000000
  116. /*
  117. * The NAND Flash partitions:
  118. */
  119. #define CONFIG_ENV_RANGE (SZ_512K)
  120. /*
  121. * Predefined environment variables.
  122. * Usefull to define some easy to use boot commands.
  123. */
  124. #define CONFIG_EXTRA_ENV_SETTINGS \
  125. \
  126. "basicargs=console=ttyS0,115200\0" \
  127. \
  128. "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"
  129. #ifdef CONFIG_SPL_BUILD
  130. #define CONFIG_SYS_INIT_SP_ADDR 0x301000
  131. #define CONFIG_SPL_STACK_R
  132. #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
  133. #else
  134. /*
  135. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  136. * leaving the correct space for initial global data structure above that
  137. * address while providing maximum stack area below.
  138. */
  139. #define CONFIG_SYS_INIT_SP_ADDR \
  140. (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  141. #endif
  142. /* Defines for SPL */
  143. #define CONFIG_SPL_MAX_SIZE (SZ_4K)
  144. #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
  145. #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
  146. #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
  147. CONFIG_SPL_BSS_MAX_SIZE)
  148. #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
  149. #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
  150. #define CONFIG_SYS_USE_NANDFLASH 1
  151. #define CONFIG_SPL_NAND_RAW_ONLY
  152. #define CONFIG_SPL_NAND_SOFTECC
  153. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
  154. #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
  155. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  156. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
  157. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  158. #define CONFIG_SYS_NAND_SIZE (SZ_256M)
  159. #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
  160. #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
  161. #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
  162. CONFIG_SYS_NAND_PAGE_SIZE)
  163. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  164. #define CONFIG_SYS_NAND_ECCSIZE 256
  165. #define CONFIG_SYS_NAND_ECCBYTES 3
  166. #define CONFIG_SYS_NAND_OOBSIZE 64
  167. #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  168. 48, 49, 50, 51, 52, 53, 54, 55, \
  169. 56, 57, 58, 59, 60, 61, 62, 63, }
  170. #define CONFIG_SPL_ATMEL_SIZE
  171. #define CONFIG_SYS_MASTER_CLOCK (198656000/2)
  172. #define AT91_PLL_LOCK_TIMEOUT 1000000
  173. #define CONFIG_SYS_AT91_PLLA 0x2060bf09
  174. #define CONFIG_SYS_MCKR 0x100
  175. #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
  176. #define CONFIG_SYS_AT91_PLLB 0x10483f0e
  177. #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
  178. #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
  179. #endif /* __CONFIG_H */