pico-imx8mq.h 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2018 NXP
  4. */
  5. #ifndef __IMX8M_PICOPI_H
  6. #define __IMX8M_PICOPI_H
  7. #include <linux/sizes.h>
  8. #include <asm/arch/imx-regs.h>
  9. #define CONFIG_SPL_MAX_SIZE (124 * 1024)
  10. #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
  11. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  12. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  13. #ifdef CONFIG_SPL_BUILD
  14. /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  15. #define CONFIG_SPL_WATCHDOG_SUPPORT
  16. #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  17. #define CONFIG_SPL_POWER_SUPPORT
  18. #define CONFIG_SPL_I2C_SUPPORT
  19. #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
  20. #define CONFIG_SPL_STACK 0x187FF0
  21. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  22. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  23. #define CONFIG_SPL_GPIO_SUPPORT
  24. #define CONFIG_SPL_MMC_SUPPORT
  25. #define CONFIG_SPL_BSS_START_ADDR 0x00180000
  26. #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
  27. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  28. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
  29. #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
  30. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  31. #define CONFIG_MALLOC_F_ADDR 0x182000
  32. /* For RAW image gives a error info not panic */
  33. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  34. #undef CONFIG_DM_MMC
  35. #undef CONFIG_DM_PMIC
  36. #define CONFIG_SYS_I2C
  37. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  38. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  39. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  40. #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  41. #define CONFIG_POWER
  42. #define CONFIG_POWER_I2C
  43. #endif
  44. #define CONFIG_REMAKE_ELF
  45. /* ENET Config */
  46. /* ENET1 */
  47. #if defined(CONFIG_CMD_NET)
  48. #define CONFIG_MII
  49. #define CONFIG_ETHPRIME "FEC"
  50. #define CONFIG_FEC_MXC
  51. #define CONFIG_FEC_XCV_TYPE RGMII
  52. #define CONFIG_FEC_MXC_PHYADDR 1
  53. #define FEC_QUIRK_ENET_MAC
  54. #define CONFIG_PHY_GIGE
  55. #define IMX_FEC_BASE 0x30BE0000
  56. #define CONFIG_PHYLIB
  57. #define CONFIG_PHY_ATHEROS
  58. #endif
  59. /* Initial environment variables */
  60. #define CONFIG_EXTRA_ENV_SETTINGS \
  61. "script=boot.scr\0" \
  62. "image=Image\0" \
  63. "console=ttymxc0,115200\0" \
  64. "fdt_addr=0x43000000\0" \
  65. "fdt_high=0xffffffffffffffff\0" \
  66. "fdt_file=imx8mq-pico-pi.dtb\0" \
  67. "initrd_addr=0x43800000\0" \
  68. "initrd_high=0xffffffffffffffff\0" \
  69. "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  70. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  71. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  72. "mmcautodetect=yes\0" \
  73. "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  74. "loadbootscript=" \
  75. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  76. "bootscript=echo Running bootscript from mmc ...; source\0" \
  77. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  78. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  79. "mmcboot=echo Booting from mmc ...; " \
  80. "run mmcargs; " \
  81. "echo wait for boot; " \
  82. "fi;\0" \
  83. "netargs=setenv bootargs console=${console} " \
  84. "root=/dev/nfs " \
  85. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  86. "netboot=echo Booting from net ...; " \
  87. "run netargs; " \
  88. "if test ${ip_dyn} = yes; then " \
  89. "setenv get_cmd dhcp; " \
  90. "else " \
  91. "setenv get_cmd tftp; " \
  92. "fi; " \
  93. "${get_cmd} ${loadaddr} ${image}; " \
  94. "booti; "
  95. #define CONFIG_BOOTCOMMAND \
  96. "mmc dev ${mmcdev}; if mmc rescan; then " \
  97. "if run loadbootscript; then " \
  98. "run bootscript; " \
  99. "else " \
  100. "if run loadimage; then " \
  101. "run mmcboot; " \
  102. "else run netboot; " \
  103. "fi; " \
  104. "fi; " \
  105. "else booti ${loadaddr} - ${fdt_addr}; fi"
  106. /* Link Definitions */
  107. #define CONFIG_LOADADDR 0x40480000
  108. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  109. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  110. #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
  111. #define CONFIG_SYS_INIT_SP_OFFSET \
  112. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  113. #define CONFIG_SYS_INIT_SP_ADDR \
  114. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  115. #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
  116. /* Size of malloc() pool */
  117. #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
  118. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  119. #define PHYS_SDRAM 0x40000000
  120. #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
  121. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  122. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
  123. (PHYS_SDRAM_SIZE >> 1))
  124. #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
  125. /* Monitor Command Prompt */
  126. #define CONFIG_SYS_CBSIZE 1024
  127. #define CONFIG_SYS_MAXARGS 64
  128. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  129. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  130. sizeof(CONFIG_SYS_PROMPT) + 16)
  131. #define CONFIG_IMX_BOOTAUX
  132. #define CONFIG_SYS_FSL_USDHC_NUM 2
  133. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  134. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  135. #define CONFIG_MXC_GPIO
  136. /* I2C Configs */
  137. #define CONFIG_SYS_I2C_SPEED 100000
  138. #define CONFIG_OF_SYSTEM_SETUP
  139. #ifndef CONFIG_SPL_BUILD
  140. #define CONFIG_DM_PMIC
  141. #endif
  142. #define CONFIG_SYS_BOOTM_LEN SZ_128M
  143. #endif