pcl063_ull.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Board configuration file for Phytec phyBOARD-i.MX6ULL-Segin SBC
  4. * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
  5. *
  6. * Based on include/configs/xpress.h:
  7. * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
  8. */
  9. #ifndef __PCL063_ULL_H
  10. #define __PCL063_ULL_H
  11. #include <linux/sizes.h>
  12. #include <linux/stringify.h>
  13. #include "mx6_common.h"
  14. /* SPL options */
  15. #include "imx6_spl.h"
  16. #define CONFIG_SYS_FSL_USDHC_NUM 2
  17. /* Size of malloc() pool */
  18. #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
  19. /* Environment settings */
  20. /* Environment in SD */
  21. #define MMC_ROOTFS_DEV 0
  22. #define MMC_ROOTFS_PART 2
  23. /* Console configs */
  24. #define CONFIG_MXC_UART_BASE UART1_BASE
  25. /* MMC Configs */
  26. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
  27. #define CONFIG_SUPPORT_EMMC_BOOT
  28. /* I2C configs */
  29. #ifdef CONFIG_CMD_I2C
  30. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  31. #define CONFIG_SYS_I2C_SPEED 100000
  32. #endif
  33. /* Miscellaneous configurable options */
  34. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  35. #define CONFIG_SYS_HZ 1000
  36. /* Physical Memory Map */
  37. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  38. #define PHYS_SDRAM_SIZE SZ_256M
  39. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  40. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  41. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  42. #define CONFIG_SYS_INIT_SP_OFFSET \
  43. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  44. #define CONFIG_SYS_INIT_SP_ADDR \
  45. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  46. /* NAND */
  47. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  48. #define CONFIG_SYS_NAND_BASE 0x40000000
  49. /* USB Configs */
  50. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  51. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  52. #define CONFIG_MXC_USB_FLAGS 0
  53. #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  54. #define ENV_MMC \
  55. "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
  56. "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
  57. "fitpart=1\0" \
  58. "bootdelay=3\0" \
  59. "silent=1\0" \
  60. "optargs=rw rootwait\0" \
  61. "mmcautodetect=yes\0" \
  62. "mmcrootfstype=ext4\0" \
  63. "mmcfit_name=fitImage\0" \
  64. "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
  65. "${mmcfit_name}\0" \
  66. "mmcargs=setenv bootargs " \
  67. "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
  68. "console=${console} rootfstype=${mmcrootfstype}\0" \
  69. "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
  70. /* Default environment */
  71. #define CONFIG_EXTRA_ENV_SETTINGS \
  72. "fdt_high=0xffffffff\0" \
  73. "console=ttymxc0,115200n8\0" \
  74. "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
  75. "fit_addr=0x82000000\0" \
  76. ENV_MMC
  77. #define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
  78. #define BOOT_TARGET_DEVICES(func) \
  79. func(MMC, mmc, 0) \
  80. func(MMC, mmc, 1) \
  81. func(DHCP, dhcp, na)
  82. #include <config_distro_bootcmd.h>
  83. #endif /* __PCL063_ULL_H */