ot1200.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
  4. * Copyright (C) 2014 Bachmann electronic GmbH
  5. */
  6. #ifndef __CONFIG_H
  7. #define __CONFIG_H
  8. #include "mx6_common.h"
  9. /* Size of malloc() pool */
  10. #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
  11. /* UART Configs */
  12. #define CONFIG_MXC_UART_BASE UART1_BASE
  13. /* SF Configs */
  14. /* IO expander */
  15. #define CONFIG_PCA953X
  16. #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
  17. #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
  18. /* I2C Configs */
  19. #define CONFIG_SYS_I2C
  20. #define CONFIG_SYS_I2C_MXC
  21. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  22. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  23. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  24. #define CONFIG_SYS_I2C_SPEED 100000
  25. /* OCOTP Configs */
  26. #define CONFIG_IMX_OTP
  27. #define IMX_OTP_BASE OCOTP_BASE_ADDR
  28. #define IMX_OTP_ADDR_MAX 0x7F
  29. #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
  30. #define IMX_OTPWRITE_ENABLED
  31. /* MMC Configs */
  32. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  33. #define CONFIG_SYS_FSL_USDHC_NUM 2
  34. /* USB Configs */
  35. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  36. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  37. /*
  38. * SATA Configs
  39. */
  40. #ifdef CONFIG_CMD_SATA
  41. #define CONFIG_SYS_SATA_MAX_DEVICE 1
  42. #define CONFIG_DWC_AHSATA_PORT_ID 0
  43. #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
  44. #define CONFIG_LBA48
  45. #endif
  46. /* SPL */
  47. #ifdef CONFIG_SPL
  48. #include "imx6_spl.h"
  49. #endif
  50. #define CONFIG_FEC_MXC
  51. #define IMX_FEC_BASE ENET_BASE_ADDR
  52. #define CONFIG_FEC_XCV_TYPE MII100
  53. #define CONFIG_ETHPRIME "FEC"
  54. #define CONFIG_FEC_MXC_PHYADDR 0x5
  55. #ifndef CONFIG_SPL
  56. #define CONFIG_ENV_EEPROM_IS_ON_I2C
  57. #define CONFIG_SYS_I2C_EEPROM_BUS 1
  58. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  59. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  60. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
  61. #endif
  62. /* Physical Memory Map */
  63. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  64. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  65. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  66. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  67. #define CONFIG_SYS_INIT_SP_OFFSET \
  68. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  69. #define CONFIG_SYS_INIT_SP_ADDR \
  70. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  71. /* Environment organization */
  72. /* M25P16 has an erase size of 64 KiB */
  73. #define CONFIG_BOOTP_SERVERIP
  74. #define CONFIG_BOOTP_BOOTFILE
  75. #endif /* __CONFIG_H */