mxs.h 3.7 KB

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  1. /*
  2. * Copyright (C) 2013 Marek Vasut <marex@denx.de>
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #ifndef __CONFIGS_MXS_H__
  20. #define __CONFIGS_MXS_H__
  21. /*
  22. * Includes
  23. */
  24. #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
  25. #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
  26. #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
  27. #error Select one of CONFIG_MX23 or CONFIG_MX28 !
  28. #endif
  29. #include <asm/arch/regs-base.h>
  30. #if defined(CONFIG_MX23)
  31. #include <asm/arch/iomux-mx23.h>
  32. #elif defined(CONFIG_MX28)
  33. #include <asm/arch/iomux-mx28.h>
  34. #endif
  35. /*
  36. * CPU specifics
  37. */
  38. /* Startup hooks */
  39. /* SPL */
  40. #ifndef CONFIG_SPL_FRAMEWORK
  41. #define CONFIG_SPL_NO_CPU_SUPPORT
  42. #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
  43. #endif
  44. /* Memory sizes */
  45. #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
  46. /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
  47. #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
  48. #if defined(CONFIG_MX23)
  49. #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
  50. #elif defined(CONFIG_MX28)
  51. #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
  52. #endif
  53. /* Point initial SP in SRAM so SPL can use it too. */
  54. #define CONFIG_SYS_INIT_SP_OFFSET \
  55. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  56. #define CONFIG_SYS_INIT_SP_ADDR \
  57. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  58. /*
  59. * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
  60. * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
  61. * binary. In case there was more of this mess, 0x100 bytes are skipped.
  62. *
  63. * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
  64. * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
  65. * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
  66. *
  67. * As for the SPL, we must avoid the first 4 KiB as well, but we load the
  68. * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
  69. */
  70. /* U-Boot general configuration */
  71. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
  72. #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
  73. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  74. /* Boot argument buffer size */
  75. /* Booting Linux */
  76. #define CONFIG_CMDLINE_TAG
  77. #define CONFIG_SETUP_MEMORY_TAGS
  78. /*
  79. * Drivers
  80. */
  81. /*
  82. * DUART Serial Driver.
  83. * Conflicts with AUART driver which can be set by board.
  84. */
  85. #define CONFIG_PL011_CLOCK 24000000
  86. #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
  87. /* Default baudrate can be overridden by board! */
  88. /* FEC Ethernet on SoC */
  89. #ifdef CONFIG_FEC_MXC
  90. #ifndef CONFIG_ETHPRIME
  91. #define CONFIG_ETHPRIME "FEC0"
  92. #endif
  93. #ifndef CONFIG_FEC_XCV_TYPE
  94. #define CONFIG_FEC_XCV_TYPE RMII
  95. #endif
  96. #endif
  97. /* LCD */
  98. #ifdef CONFIG_VIDEO
  99. #define CONFIG_VIDEO_MXS
  100. #endif
  101. /* NAND */
  102. #ifdef CONFIG_CMD_NAND
  103. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  104. #define CONFIG_SYS_NAND_BASE 0x60000000
  105. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  106. #endif
  107. /* OCOTP */
  108. #ifdef CONFIG_CMD_FUSE
  109. #define CONFIG_MXS_OCOTP
  110. #endif
  111. /* SPI */
  112. #ifdef CONFIG_CMD_SPI
  113. #define CONFIG_SPI_HALF_DUPLEX
  114. #endif
  115. /* USB */
  116. #ifdef CONFIG_CMD_USB
  117. #define CONFIG_USB_EHCI_MXS
  118. #define CONFIG_EHCI_IS_TDI
  119. #endif
  120. #endif /* __CONFIGS_MXS_H__ */