ls1012ardb.h 3.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2020 NXP
  4. * Copyright 2016 Freescale Semiconductor, Inc.
  5. */
  6. #ifndef __LS1012ARDB_H__
  7. #define __LS1012ARDB_H__
  8. #include "ls1012a_common.h"
  9. /* DDR */
  10. #define CONFIG_DIMM_SLOTS_PER_CTLR 1
  11. #define CONFIG_CHIP_SELECTS_PER_CTRL 1
  12. #define CONFIG_SYS_SDRAM_SIZE 0x40000000
  13. /*
  14. * I2C IO expander
  15. */
  16. #define I2C_MUX_IO_ADDR 0x24
  17. #define I2C_MUX_IO2_ADDR 0x25
  18. #define I2C_MUX_IO_0 0
  19. #define I2C_MUX_IO_1 1
  20. #define SW_BOOT_MASK 0x03
  21. #define SW_BOOT_EMU 0x02
  22. #define SW_BOOT_BANK1 0x00
  23. #define SW_BOOT_BANK2 0x01
  24. #define SW_REV_MASK 0xF8
  25. #define SW_REV_A 0xF8
  26. #define SW_REV_B 0xF0
  27. #define SW_REV_C 0xE8
  28. #define SW_REV_C1 0xE0
  29. #define SW_REV_C2 0xD8
  30. #define SW_REV_D 0xD0
  31. #define SW_REV_E 0xC8
  32. #define __PHY_MASK 0xF9
  33. #define __PHY_ETH2_MASK 0xFB
  34. #define __PHY_ETH1_MASK 0xFD
  35. /* MMC */
  36. #ifdef CONFIG_MMC
  37. #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
  38. #endif
  39. #define CONFIG_PCIE1 /* PCIE controller 1 */
  40. #define CONFIG_PCI_SCAN_SHOW
  41. #undef CONFIG_EXTRA_ENV_SETTINGS
  42. #define CONFIG_EXTRA_ENV_SETTINGS \
  43. "verify=no\0" \
  44. "initrd_high=0xffffffffffffffff\0" \
  45. "fdt_addr=0x00f00000\0" \
  46. "kernel_addr=0x01000000\0" \
  47. "kernelheader_addr=0x600000\0" \
  48. "scriptaddr=0x80000000\0" \
  49. "scripthdraddr=0x80080000\0" \
  50. "fdtheader_addr_r=0x80100000\0" \
  51. "kernelheader_addr_r=0x80200000\0" \
  52. "kernel_addr_r=0x96000000\0" \
  53. "fdt_addr_r=0x90000000\0" \
  54. "load_addr=0xa0000000\0" \
  55. "kernel_size=0x2800000\0" \
  56. "kernelheader_size=0x40000\0" \
  57. "bootm_size=0x10000000\0" \
  58. "console=ttyS0,115200\0" \
  59. BOOTENV \
  60. "boot_scripts=ls1012ardb_boot.scr\0" \
  61. "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \
  62. "scan_dev_for_boot_part=" \
  63. "part list ${devtype} ${devnum} devplist; " \
  64. "env exists devplist || setenv devplist 1; " \
  65. "for distro_bootpart in ${devplist}; do " \
  66. "if fstype ${devtype} " \
  67. "${devnum}:${distro_bootpart} " \
  68. "bootfstype; then " \
  69. "run scan_dev_for_boot; " \
  70. "fi; " \
  71. "done\0" \
  72. "scan_dev_for_boot=" \
  73. "echo Scanning ${devtype} " \
  74. "${devnum}:${distro_bootpart}...; " \
  75. "for prefix in ${boot_prefixes}; do " \
  76. "run scan_dev_for_scripts; " \
  77. "done;" \
  78. "\0" \
  79. "boot_a_script=" \
  80. "load ${devtype} ${devnum}:${distro_bootpart} " \
  81. "${scriptaddr} ${prefix}${script}; " \
  82. "env exists secureboot && load ${devtype} " \
  83. "${devnum}:${distro_bootpart} " \
  84. "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
  85. "env exists secureboot " \
  86. "&& esbc_validate ${scripthdraddr};" \
  87. "source ${scriptaddr}\0" \
  88. "installer=load mmc 0:2 $load_addr " \
  89. "/flex_installer_arm64.itb; " \
  90. "bootm $load_addr#$board\0" \
  91. "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
  92. "sf probe && sf read $load_addr " \
  93. "$kernel_addr $kernel_size; env exists secureboot " \
  94. "&& sf read $kernelheader_addr_r $kernelheader_addr " \
  95. "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
  96. "bootm $load_addr#$board\0"
  97. #undef CONFIG_BOOTCOMMAND
  98. #ifdef CONFIG_TFABOOT
  99. #undef QSPI_NOR_BOOTCOMMAND
  100. #define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
  101. "env exists secureboot && esbc_halt;"
  102. #else
  103. #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
  104. "env exists secureboot && esbc_halt;"
  105. #endif
  106. #include <asm/fsl_secure_boot.h>
  107. #endif /* __LS1012ARDB_H__ */