imx8mm_beacon.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2020 Compass Electronics Group, LLC
  4. */
  5. #ifndef __IMX8MM_BEACON_H
  6. #define __IMX8MM_BEACON_H
  7. #include <linux/sizes.h>
  8. #include <asm/arch/imx-regs.h>
  9. #define CONFIG_SPL_MAX_SIZE (148 * 1024)
  10. #define CONFIG_SYS_MONITOR_LEN SZ_512K
  11. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  12. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  13. #define CONFIG_SYS_UBOOT_BASE \
  14. (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  15. #ifdef CONFIG_SPL_BUILD
  16. #define CONFIG_SPL_STACK 0x920000
  17. #define CONFIG_SPL_BSS_START_ADDR 0x910000
  18. #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
  19. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  20. #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
  21. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  22. #define CONFIG_MALLOC_F_ADDR 0x930000
  23. /* For RAW image gives a error info not panic */
  24. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  25. #endif
  26. /* Initial environment variables */
  27. #define CONFIG_EXTRA_ENV_SETTINGS \
  28. "script=boot.scr\0" \
  29. "image=Image\0" \
  30. "console=ttymxc1,115200\0" \
  31. "fdt_addr=0x43000000\0" \
  32. "fdt_high=0xffffffffffffffff\0" \
  33. "boot_fit=try\0" \
  34. "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  35. "initrd_addr=0x43800000\0" \
  36. "initrd_high=0xffffffffffffffff\0" \
  37. "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  38. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  39. "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
  40. "mmcautodetect=yes\0" \
  41. "mmcargs=setenv bootargs console=${console},${baudrate}" \
  42. " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
  43. "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
  44. " ${script};\0" \
  45. "bootscript=echo Running bootscript from mmc ...; " \
  46. "source\0" \
  47. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  48. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  49. "mmcboot=echo Booting from mmc ...; " \
  50. "run finduuid; " \
  51. "run mmcargs; " \
  52. "if run loadfdt; then " \
  53. "booti ${loadaddr} - ${fdt_addr}; " \
  54. "else " \
  55. "echo WARN: Cannot load the DT; " \
  56. "fi; " \
  57. "netargs=setenv bootargs console=${console} " \
  58. "root=/dev/nfs " \
  59. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  60. "netboot=echo Booting from net ...; " \
  61. "run netargs; " \
  62. "if test ${ip_dyn} = yes; then " \
  63. "setenv get_cmd dhcp; " \
  64. "else " \
  65. "setenv get_cmd tftp; " \
  66. "fi; " \
  67. "${get_cmd} ${loadaddr} ${image}; " \
  68. "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
  69. "bootm ${loadaddr}; " \
  70. "else " \
  71. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  72. "booti ${loadaddr} - ${fdt_addr}; " \
  73. "else " \
  74. "echo WARN: Cannot load the DT; " \
  75. "fi; " \
  76. "fi;\0"
  77. #define CONFIG_BOOTCOMMAND \
  78. "mmc dev ${mmcdev}; if mmc rescan; then " \
  79. "if run loadbootscript; then " \
  80. "run bootscript; " \
  81. "else " \
  82. "if run loadimage; then " \
  83. "run mmcboot; " \
  84. "else run netboot; " \
  85. "fi; " \
  86. "fi; " \
  87. "fi;"
  88. /* Link Definitions */
  89. #define CONFIG_LOADADDR 0x40480000
  90. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  91. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  92. #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
  93. #define CONFIG_SYS_INIT_SP_OFFSET \
  94. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  95. #define CONFIG_SYS_INIT_SP_ADDR \
  96. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  97. /* Size of malloc() pool */
  98. #define CONFIG_SYS_MALLOC_LEN SZ_32M
  99. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  100. #define PHYS_SDRAM 0x40000000
  101. #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
  102. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  103. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
  104. #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
  105. /* Monitor Command Prompt */
  106. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  107. #define CONFIG_SYS_CBSIZE 2048
  108. #define CONFIG_SYS_MAXARGS 64
  109. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  110. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  111. sizeof(CONFIG_SYS_PROMPT) + 16)
  112. /* USDHC */
  113. #define CONFIG_SYS_FSL_USDHC_NUM 2
  114. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  115. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  116. /* I2C */
  117. #define CONFIG_SYS_I2C_SPEED 100000
  118. /* FEC*/
  119. #define CONFIG_ETHPRIME "FEC"
  120. #define CONFIG_FEC_XCV_TYPE RGMII
  121. #define CONFIG_FEC_MXC_PHYADDR 0
  122. #define FEC_QUIRK_ENET_MAC
  123. #define IMX_FEC_BASE 0x30BE0000
  124. #endif