imx27lite-common.h 4.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
  4. *
  5. * based on:
  6. * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  7. */
  8. #ifndef __IMX27LITE_COMMON_CONFIG_H
  9. #define __IMX27LITE_COMMON_CONFIG_H
  10. /*
  11. * SoC Configuration
  12. */
  13. #define CONFIG_MX27
  14. #define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
  15. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  16. #define CONFIG_SETUP_MEMORY_TAGS 1
  17. #define CONFIG_INITRD_TAG 1
  18. /*
  19. * Lowlevel configuration
  20. */
  21. #define SDRAM_ESDCFG_REGISTER_VAL(cas) \
  22. (ESDCFG_TRC(10) | \
  23. ESDCFG_TRCD(3) | \
  24. ESDCFG_TCAS(cas) | \
  25. ESDCFG_TRRD(1) | \
  26. ESDCFG_TRAS(5) | \
  27. ESDCFG_TWR | \
  28. ESDCFG_TMRD(2) | \
  29. ESDCFG_TRP(2) | \
  30. ESDCFG_TXP(3))
  31. #define SDRAM_ESDCTL_REGISTER_VAL \
  32. (ESDCTL_PRCT(0) | \
  33. ESDCTL_BL | \
  34. ESDCTL_PWDT(0) | \
  35. ESDCTL_SREFR(3) | \
  36. ESDCTL_DSIZ_32 | \
  37. ESDCTL_COL10 | \
  38. ESDCTL_ROW13 | \
  39. ESDCTL_SDE)
  40. #define SDRAM_ALL_VAL 0xf00
  41. #define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
  42. #define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
  43. #define MPCTL0_VAL 0x1ef15d5
  44. #define SPCTL0_VAL 0x043a1c09
  45. #define CSCR_VAL 0x33f08107
  46. #define PCDR0_VAL 0x120470c3
  47. #define PCDR1_VAL 0x03030303
  48. #define PCCR0_VAL 0xffffffff
  49. #define PCCR1_VAL 0xfffffffc
  50. #define AIPI1_PSR0_VAL 0x20040304
  51. #define AIPI1_PSR1_VAL 0xdffbfcfb
  52. #define AIPI2_PSR0_VAL 0x07ffc200
  53. #define AIPI2_PSR1_VAL 0xffffffff
  54. /*
  55. * Memory Info
  56. */
  57. /* malloc() len */
  58. #define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
  59. /* memtest start address */
  60. #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
  61. #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
  62. /*
  63. * Serial Driver info
  64. */
  65. #define CONFIG_MXC_UART_BASE UART1_BASE
  66. /*
  67. * Flash & Environment
  68. */
  69. /* Use buffered writes (~10x faster) */
  70. /* Use hardware sector protection */
  71. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
  72. /* CS2 Base address */
  73. #define PHYS_FLASH_1 0xc0000000
  74. /* Flash Base for U-Boot */
  75. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  76. #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
  77. CONFIG_SYS_FLASH_SECT_SZ)
  78. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  79. #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
  80. /* Address and size of Redundant Environment Sector */
  81. /*
  82. * Ethernet
  83. */
  84. #define CONFIG_FEC_MXC
  85. #define CONFIG_FEC_MXC_PHYADDR 0x1f
  86. /*
  87. * MTD
  88. */
  89. /*
  90. * NAND
  91. */
  92. #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
  93. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  94. #define CONFIG_SYS_NAND_BASE 0xd8000000
  95. #define CONFIG_JFFS2_NAND
  96. #define CONFIG_MXC_NAND_HWECC
  97. /*
  98. * U-Boot general configuration
  99. */
  100. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  101. /* Boot Argument Buffer Size */
  102. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  103. #define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
  104. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  105. #define CONFIG_EXTRA_ENV_SETTINGS \
  106. "netdev=eth0\0" \
  107. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  108. "nfsroot=${serverip}:${rootpath}\0" \
  109. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  110. "addip=setenv bootargs ${bootargs} " \
  111. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  112. ":${hostname}:${netdev}:off panic=1\0" \
  113. "addtty=setenv bootargs ${bootargs}" \
  114. " console=ttymxc0,${baudrate}\0" \
  115. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  116. "addmisc=setenv bootargs ${bootargs}\0" \
  117. "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
  118. "kernel_addr_r=a0800000\0" \
  119. "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
  120. "rootpath=/opt/eldk-4.2-arm/arm\0" \
  121. "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
  122. "run nfsargs addip addtty addmtd addmisc;" \
  123. "bootm\0" \
  124. "bootcmd=run net_nfs\0" \
  125. "load=tftp ${loadaddr} ${u-boot}\0" \
  126. "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \
  127. " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
  128. " +${filesize};cp.b ${fileaddr} " \
  129. __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
  130. "upd=run load update\0" \
  131. "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
  132. "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  133. /* additions for new relocation code, must be added to all boards */
  134. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  135. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
  136. GENERATED_GBL_DATA_SIZE)
  137. #endif /* __IMX27LITE_COMMON_CONFIG_H */