at91sam9n12ek.h 3.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2013 Atmel Corporation.
  4. * Josh Wu <josh.wu@atmel.com>
  5. *
  6. * Configuation settings for the AT91SAM9N12-EK boards.
  7. */
  8. #ifndef __AT91SAM9N12_CONFIG_H_
  9. #define __AT91SAM9N12_CONFIG_H_
  10. /* ARM asynchronous clock */
  11. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  12. #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
  13. /* Misc CPU related */
  14. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  15. #define CONFIG_SETUP_MEMORY_TAGS
  16. #define CONFIG_INITRD_TAG
  17. #define CONFIG_SKIP_LOWLEVEL_INIT
  18. /* LCD */
  19. #define LCD_BPP LCD_COLOR16
  20. #define LCD_OUTPUT_BPP 24
  21. #define CONFIG_LCD_LOGO
  22. #define CONFIG_LCD_INFO
  23. #define CONFIG_LCD_INFO_BELOW_LOGO
  24. #define CONFIG_ATMEL_LCD_RGB565
  25. /*
  26. * BOOTP options
  27. */
  28. #define CONFIG_BOOTP_BOOTFILESIZE
  29. #define CONFIG_SYS_SDRAM_BASE 0x20000000
  30. #define CONFIG_SYS_SDRAM_SIZE 0x08000000
  31. /*
  32. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  33. * leaving the correct space for initial global data structure above
  34. * that address while providing maximum stack area below.
  35. */
  36. # define CONFIG_SYS_INIT_SP_ADDR \
  37. (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  38. /* DataFlash */
  39. /* NAND flash */
  40. #ifdef CONFIG_CMD_NAND
  41. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  42. #define CONFIG_SYS_NAND_BASE 0x40000000
  43. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  44. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  45. #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
  46. #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
  47. #endif
  48. #define CONFIG_EXTRA_ENV_SETTINGS \
  49. "console=console=ttyS0,115200\0" \
  50. "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
  51. "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
  52. "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
  53. /* Ethernet */
  54. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  55. /* USB host */
  56. #ifdef CONFIG_CMD_USB
  57. #define CONFIG_USB_ATMEL
  58. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  59. #define CONFIG_USB_OHCI_NEW
  60. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  61. #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
  62. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
  63. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
  64. #endif
  65. #ifdef CONFIG_SPI_BOOT
  66. /* bootstrap + u-boot + env + linux in dataflash on CS0 */
  67. #define CONFIG_BOOTCOMMAND \
  68. "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
  69. "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
  70. "bootm 0x22000000"
  71. #elif defined(CONFIG_NAND_BOOT)
  72. /* bootstrap + u-boot + env + linux in nandflash */
  73. #define CONFIG_BOOTCOMMAND \
  74. "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
  75. "nand read 0x21000000 0x180000 0x080000;" \
  76. "nand read 0x22000000 0x200000 0x400000;" \
  77. "bootm 0x22000000 - 0x21000000"
  78. #else /* CONFIG_SD_BOOT */
  79. #define CONFIG_BOOTCOMMAND \
  80. "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
  81. "fatload mmc 0:1 0x21000000 dtb;" \
  82. "fatload mmc 0:1 0x22000000 uImage;" \
  83. "bootm 0x22000000 - 0x21000000"
  84. #endif
  85. /*
  86. * Size of malloc() pool
  87. */
  88. #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
  89. /* SPL */
  90. #define CONFIG_SPL_MAX_SIZE 0x6000
  91. #define CONFIG_SPL_STACK 0x308000
  92. #define CONFIG_SPL_BSS_START_ADDR 0x20000000
  93. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  94. #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  95. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  96. #define CONFIG_SYS_MONITOR_LEN (512 << 10)
  97. #define CONFIG_SYS_MASTER_CLOCK 132096000
  98. #define CONFIG_SYS_AT91_PLLA 0x20953f03
  99. #define CONFIG_SYS_MCKR 0x1301
  100. #define CONFIG_SYS_MCKR_CSS 0x1302
  101. #ifdef CONFIG_SD_BOOT
  102. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  103. #endif
  104. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
  105. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  106. #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  107. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  108. #define CONFIG_SYS_NAND_OOBSIZE 64
  109. #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  110. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  111. #endif