at91sam9261ek.h 3.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. *
  7. * Configuation settings for the AT91SAM9261EK board.
  8. */
  9. #ifndef __CONFIG_H
  10. #define __CONFIG_H
  11. /* ARM asynchronous clock */
  12. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  13. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
  14. #ifdef CONFIG_AT91SAM9G10
  15. #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
  16. #else
  17. #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
  18. #endif
  19. #include <asm/hardware.h>
  20. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  21. #define CONFIG_SETUP_MEMORY_TAGS
  22. #define CONFIG_INITRD_TAG
  23. #define CONFIG_SKIP_LOWLEVEL_INIT
  24. #define CONFIG_ATMEL_LEGACY
  25. /*
  26. * Hardware drivers
  27. */
  28. /* LCD */
  29. #define LCD_BPP LCD_COLOR8
  30. #define CONFIG_LCD_LOGO
  31. #undef LCD_TEST_PATTERN
  32. #define CONFIG_LCD_INFO
  33. #define CONFIG_LCD_INFO_BELOW_LOGO
  34. #define CONFIG_ATMEL_LCD
  35. #ifdef CONFIG_AT91SAM9261EK
  36. #define CONFIG_ATMEL_LCD_BGR555
  37. #endif
  38. /*
  39. * BOOTP options
  40. */
  41. #define CONFIG_BOOTP_BOOTFILESIZE
  42. /* SDRAM */
  43. #define CONFIG_SYS_SDRAM_BASE 0x20000000
  44. #define CONFIG_SYS_SDRAM_SIZE 0x04000000
  45. #define CONFIG_SYS_INIT_SP_ADDR \
  46. (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  47. /* NAND flash */
  48. #ifdef CONFIG_CMD_NAND
  49. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  50. #define CONFIG_SYS_NAND_BASE 0x40000000
  51. #define CONFIG_SYS_NAND_DBW_8
  52. /* our ALE is AD22 */
  53. #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
  54. /* our CLE is AD21 */
  55. #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
  56. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  57. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
  58. #endif
  59. /* Ethernet */
  60. #define CONFIG_DRIVER_DM9000
  61. #define CONFIG_DM9000_BASE 0x30000000
  62. #define DM9000_IO CONFIG_DM9000_BASE
  63. #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
  64. #define CONFIG_DM9000_USE_16BIT
  65. #define CONFIG_DM9000_NO_SROM
  66. #define CONFIG_NET_RETRY_COUNT 20
  67. #define CONFIG_RESET_PHY_R
  68. /* USB */
  69. #define CONFIG_USB_ATMEL
  70. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  71. #define CONFIG_USB_OHCI_NEW
  72. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  73. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
  74. #ifdef CONFIG_AT91SAM9G10EK
  75. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
  76. #else
  77. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
  78. #endif
  79. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  80. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  81. #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
  82. /* bootstrap + u-boot + env + linux in dataflash on CS0 */
  83. #define CONFIG_BOOTCOMMAND "sf probe 0; " \
  84. "sf read 0x22000000 0x84000 0x294000; " \
  85. "bootm 0x22000000"
  86. #elif CONFIG_SYS_USE_DATAFLASH_CS3
  87. /* bootstrap + u-boot + env + linux in dataflash on CS3 */
  88. #define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
  89. "sf read 0x22000000 0x84000 0x294000; " \
  90. "bootm 0x22000000"
  91. #else /* CONFIG_SYS_USE_NANDFLASH */
  92. /* bootstrap + u-boot + env + linux in nandflash */
  93. #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
  94. #endif
  95. /*
  96. * Size of malloc() pool
  97. */
  98. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
  99. #endif