M5275EVB.h 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the Motorola MC5275EVB board.
  4. *
  5. * By Arthur Shipkowski <art@videon-central.com>
  6. * Copyright (C) 2005 Videon Central, Inc.
  7. *
  8. * Based off of M5272C3 board code by Josef Baumgartner
  9. * <josef.baumgartner@telex.de>
  10. */
  11. /*
  12. * board/config.h - configuration options, board specific
  13. */
  14. #ifndef _M5275EVB_H
  15. #define _M5275EVB_H
  16. /*
  17. * High Level Configuration Options
  18. * (easy to change)
  19. */
  20. #define CONFIG_MCFTMR
  21. #define CONFIG_MCFUART
  22. #define CONFIG_SYS_UART_PORT (0)
  23. /* Configuration for environment
  24. * Environment is embedded in u-boot in the second sector of the flash
  25. */
  26. #define LDS_BOARD_TEXT \
  27. . = DEFINED(env_offset) ? env_offset : .; \
  28. env/embedded.o(.text);
  29. /*
  30. * BOOTP options
  31. */
  32. #define CONFIG_BOOTP_BOOTFILESIZE
  33. /* Available command configuration */
  34. #ifdef CONFIG_MCFFEC
  35. #define CONFIG_MII_INIT 1
  36. #define CONFIG_SYS_DISCOVER_PHY
  37. #define CONFIG_SYS_RX_ETH_BUFFER 8
  38. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  39. #define CONFIG_HAS_ETH1
  40. /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  41. #ifndef CONFIG_SYS_DISCOVER_PHY
  42. #define FECDUPLEX FULL
  43. #define FECSPEED _100BASET
  44. #else
  45. #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  46. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  47. #endif
  48. #endif
  49. #endif
  50. /* I2C */
  51. #define CONFIG_SYS_I2C
  52. #define CONFIG_SYS_I2C_FSL
  53. #define CONFIG_SYS_FSL_I2C_SPEED 80000
  54. #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
  55. #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
  56. #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
  57. #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
  58. #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
  59. #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
  60. #define CONFIG_SYS_LOAD_ADDR 0x800000
  61. #define CONFIG_BOOTCOMMAND "bootm ffe40000"
  62. #ifdef CONFIG_MCFFEC
  63. # define CONFIG_NET_RETRY_COUNT 5
  64. # define CONFIG_OVERWRITE_ETHADDR_ONCE
  65. #endif /* FEC_ENET */
  66. #define CONFIG_EXTRA_ENV_SETTINGS \
  67. "netdev=eth0\0" \
  68. "loadaddr=10000\0" \
  69. "uboot=u-boot.bin\0" \
  70. "load=tftp ${loadaddr} ${uboot}\0" \
  71. "upd=run load; run prog\0" \
  72. "prog=prot off ffe00000 ffe3ffff;" \
  73. "era ffe00000 ffe3ffff;" \
  74. "cp.b ${loadaddr} ffe00000 ${filesize};"\
  75. "save\0" \
  76. ""
  77. #define CONFIG_SYS_CLK 150000000
  78. /*
  79. * Low Level Configuration Settings
  80. * (address mappings, register initial values, etc.)
  81. * You should know what you are doing if you make changes here.
  82. */
  83. #define CONFIG_SYS_MBAR 0x40000000
  84. /*-----------------------------------------------------------------------
  85. * Definitions for initial stack pointer and data area (in DPRAM)
  86. */
  87. #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
  88. #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
  89. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  90. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  91. /*-----------------------------------------------------------------------
  92. * Start addresses for the final memory configuration
  93. * (Set up by the startup code)
  94. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  95. */
  96. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  97. #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
  98. #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
  99. #ifdef CONFIG_MONITOR_IS_IN_RAM
  100. #define CONFIG_SYS_MONITOR_BASE 0x20000
  101. #else
  102. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
  103. #endif
  104. #define CONFIG_SYS_MONITOR_LEN 0x20000
  105. #define CONFIG_SYS_MALLOC_LEN (256 << 10)
  106. #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
  107. /*
  108. * For booting Linux, the board info and command line data
  109. * have to be in the first 8 MB of memory, since this is
  110. * the maximum mapped by the Linux kernel during initialization ??
  111. */
  112. #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  113. #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
  114. /*-----------------------------------------------------------------------
  115. * FLASH organization
  116. */
  117. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  118. #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
  119. #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
  120. #define CONFIG_SYS_FLASH_SIZE 0x200000
  121. /*-----------------------------------------------------------------------
  122. * Cache Configuration
  123. */
  124. #define CONFIG_SYS_CACHELINE_SIZE 16
  125. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  126. CONFIG_SYS_INIT_RAM_SIZE - 8)
  127. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  128. CONFIG_SYS_INIT_RAM_SIZE - 4)
  129. #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
  130. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
  131. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  132. CF_ACR_EN | CF_ACR_SM_ALL)
  133. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
  134. CF_CACR_DISD | CF_CACR_INVI | \
  135. CF_CACR_CEIB | CF_CACR_DCM | \
  136. CF_CACR_EUSP)
  137. /*-----------------------------------------------------------------------
  138. * Memory bank definitions
  139. */
  140. #define CONFIG_SYS_CS0_BASE 0xffe00000
  141. #define CONFIG_SYS_CS0_CTRL 0x00001980
  142. #define CONFIG_SYS_CS0_MASK 0x001F0001
  143. #define CONFIG_SYS_CS1_BASE 0x30000000
  144. #define CONFIG_SYS_CS1_CTRL 0x00001900
  145. #define CONFIG_SYS_CS1_MASK 0x00070001
  146. /*-----------------------------------------------------------------------
  147. * Port configuration
  148. */
  149. #define CONFIG_SYS_FECI2C 0x0FA0
  150. #endif /* _M5275EVB_H */