M52277EVB.h 7.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the Freescale MCF52277 EVB board.
  4. *
  5. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  6. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  7. */
  8. /*
  9. * board/config.h - configuration options, board specific
  10. */
  11. #ifndef _M52277EVB_H
  12. #define _M52277EVB_H
  13. #include <linux/stringify.h>
  14. /*
  15. * High Level Configuration Options
  16. * (easy to change)
  17. */
  18. #define CONFIG_MCFUART
  19. #define CONFIG_SYS_UART_PORT (0)
  20. #undef CONFIG_WATCHDOG
  21. #define CONFIG_TIMESTAMP /* Print image info with timestamp */
  22. /*
  23. * BOOTP options
  24. */
  25. #define CONFIG_BOOTP_BOOTFILESIZE
  26. #define CONFIG_HOSTNAME "M52277EVB"
  27. #define CONFIG_SYS_UBOOT_END 0x3FFFF
  28. #define CONFIG_SYS_LOAD_ADDR2 0x40010007
  29. #ifdef CONFIG_SYS_STMICRO_BOOT
  30. /* ST Micro serial flash */
  31. #define CONFIG_EXTRA_ENV_SETTINGS \
  32. "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
  33. "loadaddr=0x40010000\0" \
  34. "uboot=u-boot.bin\0" \
  35. "load=loadb ${loadaddr} ${baudrate};" \
  36. "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
  37. "upd=run load; run prog\0" \
  38. "prog=sf probe 0:2 10000 1;" \
  39. "sf erase 0 30000;" \
  40. "sf write ${loadaddr} 0 30000;" \
  41. "save\0" \
  42. ""
  43. #endif
  44. #ifdef CONFIG_SYS_SPANSION_BOOT
  45. #define CONFIG_EXTRA_ENV_SETTINGS \
  46. "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
  47. "loadaddr=0x40010000\0" \
  48. "uboot=u-boot.bin\0" \
  49. "load=loadb ${loadaddr} ${baudrate}\0" \
  50. "upd=run load; run prog\0" \
  51. "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE) \
  52. " " __stringify(CONFIG_SYS_UBOOT_END) ";" \
  53. "era " __stringify(CONFIG_SYS_FLASH_BASE) " " \
  54. __stringify(CONFIG_SYS_UBOOT_END) ";" \
  55. "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE) \
  56. " ${filesize}; save\0" \
  57. "updsbf=run loadsbf; run progsbf\0" \
  58. "loadsbf=loadb ${loadaddr} ${baudrate};" \
  59. "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
  60. "progsbf=sf probe 0:2 10000 1;" \
  61. "sf erase 0 30000;" \
  62. "sf write ${loadaddr} 0 30000;" \
  63. ""
  64. #endif
  65. /* LCD */
  66. #ifdef CONFIG_CMD_BMP
  67. #define CONFIG_LCD_LOGO
  68. #define CONFIG_SHARP_LQ035Q7DH06
  69. #endif
  70. /* USB */
  71. #ifdef CONFIG_CMD_USB
  72. #define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
  73. #define CONFIG_SYS_USB_EHCI_CPU_INIT
  74. #endif
  75. /* Realtime clock */
  76. #define CONFIG_MCFRTC
  77. #undef RTC_DEBUG
  78. #define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
  79. /* Timer */
  80. #define CONFIG_MCFTMR
  81. /* I2c */
  82. #define CONFIG_SYS_I2C
  83. #define CONFIG_SYS_I2C_FSL
  84. #define CONFIG_SYS_FSL_I2C_SPEED 80000
  85. #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
  86. #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
  87. #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
  88. /* DSPI and Serial Flash */
  89. #define CONFIG_CF_DSPI
  90. #define CONFIG_SYS_SBFHDR_SIZE 0x7
  91. /* Input, PCI, Flexbus, and VCO */
  92. #define CONFIG_EXTRA_CLOCK
  93. #define CONFIG_SYS_INPUT_CLKSRC 16000000
  94. #define CONFIG_PRAM 2048 /* 2048 KB */
  95. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
  96. #define CONFIG_SYS_MBAR 0xFC000000
  97. /*
  98. * Low Level Configuration Settings
  99. * (address mappings, register initial values, etc.)
  100. * You should know what you are doing if you make changes here.
  101. */
  102. /*
  103. * Definitions for initial stack pointer and data area (in DPRAM)
  104. */
  105. #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
  106. #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
  107. #define CONFIG_SYS_INIT_RAM_CTRL 0x221
  108. #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
  109. #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
  110. #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
  111. /*
  112. * Start addresses for the final memory configuration
  113. * (Set up by the startup code)
  114. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  115. */
  116. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  117. #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
  118. #define CONFIG_SYS_SDRAM_CFG1 0x43711630
  119. #define CONFIG_SYS_SDRAM_CFG2 0x56670000
  120. #define CONFIG_SYS_SDRAM_CTRL 0xE1092000
  121. #define CONFIG_SYS_SDRAM_EMOD 0x81810000
  122. #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
  123. #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
  124. #ifdef CONFIG_CF_SBF
  125. # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
  126. #else
  127. # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
  128. #endif
  129. #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
  130. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  131. #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
  132. /* Initial Memory map for Linux */
  133. #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  134. #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
  135. /*
  136. * Configuration for environment
  137. * Environment is not embedded in u-boot. First time runing may have env
  138. * crc error warning if there is no correct environment on the flash.
  139. */
  140. /*-----------------------------------------------------------------------
  141. * FLASH organization
  142. */
  143. #ifdef CONFIG_SYS_STMICRO_BOOT
  144. # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
  145. # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
  146. #endif
  147. #ifdef CONFIG_SYS_SPANSION_BOOT
  148. # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
  149. # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
  150. #endif
  151. #ifdef CONFIG_SYS_FLASH_CFI
  152. # define CONFIG_FLASH_SPANSION_S29WS_N 1
  153. # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
  154. # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  155. # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  156. # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
  157. # define CONFIG_SYS_FLASH_CHECKSUM
  158. # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
  159. #endif
  160. #define LDS_BOARD_TEXT \
  161. arch/m68k/cpu/mcf5227x/built-in.o (.text*) \
  162. arch/m68k/lib/built-in.o (.text*)
  163. /*
  164. * This is setting for JFFS2 support in u-boot.
  165. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  166. */
  167. #ifdef CONFIG_CMD_JFFS2
  168. # define CONFIG_JFFS2_DEV "nor0"
  169. # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
  170. # define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
  171. #endif
  172. /*-----------------------------------------------------------------------
  173. * Cache Configuration
  174. */
  175. #define CONFIG_SYS_CACHELINE_SIZE 16
  176. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  177. CONFIG_SYS_INIT_RAM_SIZE - 8)
  178. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  179. CONFIG_SYS_INIT_RAM_SIZE - 4)
  180. #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
  181. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
  182. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  183. CF_ACR_EN | CF_ACR_SM_ALL)
  184. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
  185. CF_CACR_DISD | CF_CACR_INVI | \
  186. CF_CACR_CEIB | CF_CACR_DCM | \
  187. CF_CACR_EUSP)
  188. /*-----------------------------------------------------------------------
  189. * Memory bank definitions
  190. */
  191. /*
  192. * CS0 - NOR Flash
  193. * CS1 - Available
  194. * CS2 - Available
  195. * CS3 - Available
  196. * CS4 - Available
  197. * CS5 - Available
  198. */
  199. #ifdef CONFIG_CF_SBF
  200. #define CONFIG_SYS_CS0_BASE 0x04000000
  201. #define CONFIG_SYS_CS0_MASK 0x00FF0001
  202. #define CONFIG_SYS_CS0_CTRL 0x00001FA0
  203. #else
  204. #define CONFIG_SYS_CS0_BASE 0x00000000
  205. #define CONFIG_SYS_CS0_MASK 0x00FF0001
  206. #define CONFIG_SYS_CS0_CTRL 0x00001FA0
  207. #endif
  208. #endif /* _M52277EVB_H */