cache.h 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2019 Intel Corporation <www.intel.com>
  4. */
  5. #ifndef __CACHE_H
  6. #define __CACHE_H
  7. /*
  8. * Structure for the cache controller
  9. */
  10. struct cache_info {
  11. phys_addr_t base; /* Base physical address of cache device. */
  12. };
  13. struct cache_ops {
  14. /**
  15. * get_info() - Get basic cache info
  16. *
  17. * @dev: Device to check (UCLASS_CACHE)
  18. * @info: Place to put info
  19. * @return 0 if OK, -ve on error
  20. */
  21. int (*get_info)(struct udevice *dev, struct cache_info *info);
  22. /**
  23. * enable() - Enable cache
  24. *
  25. * @dev: Device to check (UCLASS_CACHE)
  26. * @return 0 if OK, -ve on error
  27. */
  28. int (*enable)(struct udevice *dev);
  29. /**
  30. * disable() - Flush and disable cache
  31. *
  32. * @dev: Device to check (UCLASS_CACHE)
  33. * @return 0 if OK, -ve on error
  34. */
  35. int (*disable)(struct udevice *dev);
  36. };
  37. #define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops)
  38. /**
  39. * cache_get_info() - Get information about a cache controller
  40. *
  41. * @dev: Device to check (UCLASS_CACHE)
  42. * @info: Returns cache info
  43. * @return 0 if OK, -ve on error
  44. */
  45. int cache_get_info(struct udevice *dev, struct cache_info *info);
  46. /**
  47. * cache_enable() - Enable cache
  48. *
  49. * @dev: Device to check (UCLASS_CACHE)
  50. * @return 0 if OK, -ve on error
  51. */
  52. int cache_enable(struct udevice *dev);
  53. /**
  54. * cache_disable() - Flush and disable cache
  55. *
  56. * @dev: Device to check (UCLASS_CACHE)
  57. * @return 0 if OK, -ve on error
  58. */
  59. int cache_disable(struct udevice *dev);
  60. #endif