imx_watchdog.c 3.7 KB

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  1. /*
  2. * watchdog.c - driver for i.mx on-chip watchdog
  3. *
  4. * Licensed under the GPL-2 or later.
  5. */
  6. #include <common.h>
  7. #include <cpu_func.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <asm/io.h>
  11. #include <wdt.h>
  12. #include <watchdog.h>
  13. #include <asm/arch/imx-regs.h>
  14. #ifdef CONFIG_FSL_LSCH2
  15. #include <asm/arch/immap_lsch2.h>
  16. #endif
  17. #include <fsl_wdog.h>
  18. #include <div64.h>
  19. #define TIMEOUT_MAX 128000
  20. #define TIMEOUT_MIN 500
  21. static void imx_watchdog_expire_now(struct watchdog_regs *wdog, bool ext_reset)
  22. {
  23. u16 wcr = WCR_WDE;
  24. if (ext_reset)
  25. wcr |= WCR_SRS; /* do not assert internal reset */
  26. else
  27. wcr |= WCR_WDA; /* do not assert external reset */
  28. /* Write 3 times to ensure it works, due to IMX6Q errata ERR004346 */
  29. writew(wcr, &wdog->wcr);
  30. writew(wcr, &wdog->wcr);
  31. writew(wcr, &wdog->wcr);
  32. while (1) {
  33. /*
  34. * spin before reset
  35. */
  36. }
  37. }
  38. #if !defined(CONFIG_IMX_WATCHDOG) || \
  39. (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
  40. void __attribute__((weak)) reset_cpu(ulong addr)
  41. {
  42. struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  43. imx_watchdog_expire_now(wdog, true);
  44. }
  45. #endif
  46. #if defined(CONFIG_IMX_WATCHDOG)
  47. static void imx_watchdog_reset(struct watchdog_regs *wdog)
  48. {
  49. #ifndef CONFIG_WATCHDOG_RESET_DISABLE
  50. writew(0x5555, &wdog->wsr);
  51. writew(0xaaaa, &wdog->wsr);
  52. #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
  53. }
  54. static void imx_watchdog_init(struct watchdog_regs *wdog, bool ext_reset,
  55. u64 timeout)
  56. {
  57. u16 wcr;
  58. /*
  59. * The timer watchdog can be set between
  60. * 0.5 and 128 Seconds. If not defined
  61. * in configuration file, sets 128 Seconds
  62. */
  63. #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
  64. #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
  65. #endif
  66. timeout = max_t(u64, timeout, TIMEOUT_MIN);
  67. timeout = min_t(u64, timeout, TIMEOUT_MAX);
  68. timeout = lldiv(timeout, 500) - 1;
  69. #ifdef CONFIG_FSL_LSCH2
  70. wcr = (WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout;
  71. #else
  72. wcr = WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_SRS |
  73. WCR_WDA | SET_WCR_WT(timeout);
  74. if (ext_reset)
  75. wcr |= WCR_WDT;
  76. #endif /* CONFIG_FSL_LSCH2*/
  77. writew(wcr, &wdog->wcr);
  78. imx_watchdog_reset(wdog);
  79. }
  80. #if !CONFIG_IS_ENABLED(WDT)
  81. void hw_watchdog_reset(void)
  82. {
  83. struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  84. imx_watchdog_reset(wdog);
  85. }
  86. void hw_watchdog_init(void)
  87. {
  88. struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
  89. imx_watchdog_init(wdog, true, CONFIG_WATCHDOG_TIMEOUT_MSECS);
  90. }
  91. #else
  92. struct imx_wdt_priv {
  93. void __iomem *base;
  94. bool ext_reset;
  95. };
  96. static int imx_wdt_reset(struct udevice *dev)
  97. {
  98. struct imx_wdt_priv *priv = dev_get_priv(dev);
  99. imx_watchdog_reset(priv->base);
  100. return 0;
  101. }
  102. static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
  103. {
  104. struct imx_wdt_priv *priv = dev_get_priv(dev);
  105. imx_watchdog_expire_now(priv->base, priv->ext_reset);
  106. hang();
  107. return 0;
  108. }
  109. static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
  110. {
  111. struct imx_wdt_priv *priv = dev_get_priv(dev);
  112. imx_watchdog_init(priv->base, priv->ext_reset, timeout);
  113. return 0;
  114. }
  115. static int imx_wdt_probe(struct udevice *dev)
  116. {
  117. struct imx_wdt_priv *priv = dev_get_priv(dev);
  118. priv->base = dev_read_addr_ptr(dev);
  119. if (!priv->base)
  120. return -ENOENT;
  121. priv->ext_reset = dev_read_bool(dev, "fsl,ext-reset-output");
  122. return 0;
  123. }
  124. static const struct wdt_ops imx_wdt_ops = {
  125. .start = imx_wdt_start,
  126. .reset = imx_wdt_reset,
  127. .expire_now = imx_wdt_expire_now,
  128. };
  129. static const struct udevice_id imx_wdt_ids[] = {
  130. { .compatible = "fsl,imx21-wdt" },
  131. {}
  132. };
  133. U_BOOT_DRIVER(imx_wdt) = {
  134. .name = "imx_wdt",
  135. .id = UCLASS_WDT,
  136. .of_match = imx_wdt_ids,
  137. .probe = imx_wdt_probe,
  138. .ops = &imx_wdt_ops,
  139. .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
  140. .flags = DM_FLAG_PRE_RELOC,
  141. };
  142. #endif
  143. #endif