virtio_pci.h 5.1 KB

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  1. /* SPDX-License-Identifier: BSD-3-Clause */
  2. /*
  3. * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
  4. *
  5. * From Linux kernel include/uapi/linux/virtio_pci.h
  6. */
  7. #ifndef _LINUX_VIRTIO_PCI_H
  8. #define _LINUX_VIRTIO_PCI_H
  9. #ifndef VIRTIO_PCI_NO_LEGACY
  10. /* A 32-bit r/o bitmask of the features supported by the host */
  11. #define VIRTIO_PCI_HOST_FEATURES 0
  12. /* A 32-bit r/w bitmask of features activated by the guest */
  13. #define VIRTIO_PCI_GUEST_FEATURES 4
  14. /* A 32-bit r/w PFN for the currently selected queue */
  15. #define VIRTIO_PCI_QUEUE_PFN 8
  16. /* A 16-bit r/o queue size for the currently selected queue */
  17. #define VIRTIO_PCI_QUEUE_NUM 12
  18. /* A 16-bit r/w queue selector */
  19. #define VIRTIO_PCI_QUEUE_SEL 14
  20. /* A 16-bit r/w queue notifier */
  21. #define VIRTIO_PCI_QUEUE_NOTIFY 16
  22. /* An 8-bit device status register */
  23. #define VIRTIO_PCI_STATUS 18
  24. /*
  25. * An 8-bit r/o interrupt status register. Reading the value will return the
  26. * current contents of the ISR and will also clear it. This is effectively
  27. * a read-and-acknowledge.
  28. */
  29. #define VIRTIO_PCI_ISR 19
  30. /* MSI-X registers: only enabled if MSI-X is enabled */
  31. /* A 16-bit vector for configuration changes */
  32. #define VIRTIO_MSI_CONFIG_VECTOR 20
  33. /* A 16-bit vector for selected queue notifications */
  34. #define VIRTIO_MSI_QUEUE_VECTOR 22
  35. /*
  36. * The remaining space is defined by each driver as the per-driver
  37. * configuration space
  38. */
  39. #define VIRTIO_PCI_CONFIG_OFF(msix) ((msix) ? 24 : 20)
  40. /* Virtio ABI version, this must match exactly */
  41. #define VIRTIO_PCI_ABI_VERSION 0
  42. /*
  43. * How many bits to shift physical queue address written to QUEUE_PFN.
  44. * 12 is historical, and due to x86 page size.
  45. */
  46. #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
  47. /*
  48. * The alignment to use between consumer and producer parts of vring.
  49. * x86 pagesize again.
  50. */
  51. #define VIRTIO_PCI_VRING_ALIGN 4096
  52. #endif /* VIRTIO_PCI_NO_LEGACY */
  53. /* The bit of the ISR which indicates a device configuration change */
  54. #define VIRTIO_PCI_ISR_CONFIG 0x2
  55. /* Vector value used to disable MSI for queue */
  56. #define VIRTIO_MSI_NO_VECTOR 0xffff
  57. #ifndef VIRTIO_PCI_NO_MODERN
  58. /* IDs for different capabilities. Must all exist. */
  59. /* Common configuration */
  60. #define VIRTIO_PCI_CAP_COMMON_CFG 1
  61. /* Notifications */
  62. #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
  63. /* ISR access */
  64. #define VIRTIO_PCI_CAP_ISR_CFG 3
  65. /* Device specific configuration */
  66. #define VIRTIO_PCI_CAP_DEVICE_CFG 4
  67. /* PCI configuration access */
  68. #define VIRTIO_PCI_CAP_PCI_CFG 5
  69. /* This is the PCI capability header: */
  70. struct virtio_pci_cap {
  71. __u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
  72. __u8 cap_next; /* Generic PCI field: next ptr */
  73. __u8 cap_len; /* Generic PCI field: capability length */
  74. __u8 cfg_type; /* Identifies the structure */
  75. __u8 bar; /* Where to find it */
  76. __u8 padding[3]; /* Pad to full dword */
  77. __le32 offset; /* Offset within bar */
  78. __le32 length; /* Length of the structure, in bytes */
  79. };
  80. struct virtio_pci_notify_cap {
  81. struct virtio_pci_cap cap;
  82. __le32 notify_off_multiplier; /* Multiplier for queue_notify_off */
  83. };
  84. /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
  85. struct virtio_pci_common_cfg {
  86. /* About the whole device */
  87. __le32 device_feature_select; /* read-write */
  88. __le32 device_feature; /* read-only */
  89. __le32 guest_feature_select; /* read-write */
  90. __le32 guest_feature; /* read-write */
  91. __le16 msix_config; /* read-write */
  92. __le16 num_queues; /* read-only */
  93. __u8 device_status; /* read-write */
  94. __u8 config_generation; /* read-only */
  95. /* About a specific virtqueue */
  96. __le16 queue_select; /* read-write */
  97. __le16 queue_size; /* read-write, power of 2 */
  98. __le16 queue_msix_vector; /* read-write */
  99. __le16 queue_enable; /* read-write */
  100. __le16 queue_notify_off; /* read-only */
  101. __le32 queue_desc_lo; /* read-write */
  102. __le32 queue_desc_hi; /* read-write */
  103. __le32 queue_avail_lo; /* read-write */
  104. __le32 queue_avail_hi; /* read-write */
  105. __le32 queue_used_lo; /* read-write */
  106. __le32 queue_used_hi; /* read-write */
  107. };
  108. /* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
  109. struct virtio_pci_cfg_cap {
  110. struct virtio_pci_cap cap;
  111. __u8 pci_cfg_data[4]; /* Data for BAR access */
  112. };
  113. /* Macro versions of offsets for the Old Timers! */
  114. #define VIRTIO_PCI_CAP_VNDR 0
  115. #define VIRTIO_PCI_CAP_NEXT 1
  116. #define VIRTIO_PCI_CAP_LEN 2
  117. #define VIRTIO_PCI_CAP_CFG_TYPE 3
  118. #define VIRTIO_PCI_CAP_BAR 4
  119. #define VIRTIO_PCI_CAP_OFFSET 8
  120. #define VIRTIO_PCI_CAP_LENGTH 12
  121. #define VIRTIO_PCI_NOTIFY_CAP_MULT 16
  122. #define VIRTIO_PCI_COMMON_DFSELECT 0
  123. #define VIRTIO_PCI_COMMON_DF 4
  124. #define VIRTIO_PCI_COMMON_GFSELECT 8
  125. #define VIRTIO_PCI_COMMON_GF 12
  126. #define VIRTIO_PCI_COMMON_MSIX 16
  127. #define VIRTIO_PCI_COMMON_NUMQ 18
  128. #define VIRTIO_PCI_COMMON_STATUS 20
  129. #define VIRTIO_PCI_COMMON_CFGGENERATION 21
  130. #define VIRTIO_PCI_COMMON_Q_SELECT 22
  131. #define VIRTIO_PCI_COMMON_Q_SIZE 24
  132. #define VIRTIO_PCI_COMMON_Q_MSIX 26
  133. #define VIRTIO_PCI_COMMON_Q_ENABLE 28
  134. #define VIRTIO_PCI_COMMON_Q_NOFF 30
  135. #define VIRTIO_PCI_COMMON_Q_DESCLO 32
  136. #define VIRTIO_PCI_COMMON_Q_DESCHI 36
  137. #define VIRTIO_PCI_COMMON_Q_AVAILLO 40
  138. #define VIRTIO_PCI_COMMON_Q_AVAILHI 44
  139. #define VIRTIO_PCI_COMMON_Q_USEDLO 48
  140. #define VIRTIO_PCI_COMMON_Q_USEDHI 52
  141. #endif /* VIRTIO_PCI_NO_MODERN */
  142. #endif /* _LINUX_VIRTIO_PCI_H */