musb_dsps.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Texas Instruments DSPS platforms "glue layer"
  4. *
  5. * Copyright (C) 2012, by Texas Instruments
  6. *
  7. * Based on the am35x "glue layer" code.
  8. *
  9. * This file is part of the Inventra Controller Driver for Linux.
  10. *
  11. * musb_dsps.c will be a common file for all the TI DSPS platforms
  12. * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  13. * For now only ti81x is using this and in future davinci.c, am35x.c
  14. * da8xx.c would be merged to this file after testing.
  15. */
  16. #ifndef __UBOOT__
  17. #include <dm/device_compat.h>
  18. #include <dm/devres.h>
  19. #include <linux/init.h>
  20. #include <linux/io.h>
  21. #include <linux/err.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/module.h>
  26. #include <linux/of.h>
  27. #include <linux/of_device.h>
  28. #include <linux/of_address.h>
  29. #include <plat/usb.h>
  30. #else
  31. #include <common.h>
  32. #include <dm.h>
  33. #include <dm/device_compat.h>
  34. #include <asm/omap_musb.h>
  35. #include "linux-compat.h"
  36. #endif
  37. #include "musb_core.h"
  38. /**
  39. * avoid using musb_readx()/musb_writex() as glue layer should not be
  40. * dependent on musb core layer symbols.
  41. */
  42. static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
  43. { return __raw_readb(addr + offset); }
  44. static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
  45. { return __raw_readl(addr + offset); }
  46. static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
  47. { __raw_writeb(data, addr + offset); }
  48. static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
  49. { __raw_writel(data, addr + offset); }
  50. /**
  51. * DSPS musb wrapper register offset.
  52. * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  53. * musb ips.
  54. */
  55. struct dsps_musb_wrapper {
  56. u16 revision;
  57. u16 control;
  58. u16 status;
  59. u16 eoi;
  60. u16 epintr_set;
  61. u16 epintr_clear;
  62. u16 epintr_status;
  63. u16 coreintr_set;
  64. u16 coreintr_clear;
  65. u16 coreintr_status;
  66. u16 phy_utmi;
  67. u16 mode;
  68. /* bit positions for control */
  69. unsigned reset:5;
  70. /* bit positions for interrupt */
  71. unsigned usb_shift:5;
  72. u32 usb_mask;
  73. u32 usb_bitmap;
  74. unsigned drvvbus:5;
  75. unsigned txep_shift:5;
  76. u32 txep_mask;
  77. u32 txep_bitmap;
  78. unsigned rxep_shift:5;
  79. u32 rxep_mask;
  80. u32 rxep_bitmap;
  81. /* bit positions for phy_utmi */
  82. unsigned otg_disable:5;
  83. /* bit positions for mode */
  84. unsigned iddig:5;
  85. /* miscellaneous stuff */
  86. u32 musb_core_offset;
  87. u8 poll_seconds;
  88. };
  89. static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
  90. .revision = 0x00,
  91. .control = 0x14,
  92. .status = 0x18,
  93. .eoi = 0x24,
  94. .epintr_set = 0x38,
  95. .epintr_clear = 0x40,
  96. .epintr_status = 0x30,
  97. .coreintr_set = 0x3c,
  98. .coreintr_clear = 0x44,
  99. .coreintr_status = 0x34,
  100. .phy_utmi = 0xe0,
  101. .mode = 0xe8,
  102. .reset = 0,
  103. .otg_disable = 21,
  104. .iddig = 8,
  105. .usb_shift = 0,
  106. .usb_mask = 0x1ff,
  107. .usb_bitmap = (0x1ff << 0),
  108. .drvvbus = 8,
  109. .txep_shift = 0,
  110. .txep_mask = 0xffff,
  111. .txep_bitmap = (0xffff << 0),
  112. .rxep_shift = 16,
  113. .rxep_mask = 0xfffe,
  114. .rxep_bitmap = (0xfffe << 16),
  115. .musb_core_offset = 0x400,
  116. .poll_seconds = 2,
  117. };
  118. /**
  119. * DSPS glue structure.
  120. */
  121. struct dsps_glue {
  122. struct device *dev;
  123. struct platform_device *musb; /* child musb pdev */
  124. const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
  125. struct timer_list timer; /* otg_workaround timer */
  126. };
  127. /**
  128. * dsps_musb_enable - enable interrupts
  129. */
  130. #ifndef __UBOOT__
  131. static void dsps_musb_enable(struct musb *musb)
  132. #else
  133. static int dsps_musb_enable(struct musb *musb)
  134. #endif
  135. {
  136. #ifndef __UBOOT__
  137. struct device *dev = musb->controller;
  138. struct platform_device *pdev = to_platform_device(dev->parent);
  139. struct dsps_glue *glue = platform_get_drvdata(pdev);
  140. const struct dsps_musb_wrapper *wrp = glue->wrp;
  141. #else
  142. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  143. #endif
  144. void __iomem *reg_base = musb->ctrl_base;
  145. u32 epmask, coremask;
  146. /* Workaround: setup IRQs through both register sets. */
  147. epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
  148. ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
  149. coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
  150. dsps_writel(reg_base, wrp->epintr_set, epmask);
  151. dsps_writel(reg_base, wrp->coreintr_set, coremask);
  152. /* Force the DRVVBUS IRQ so we can start polling for ID change. */
  153. #ifndef __UBOOT__
  154. if (is_otg_enabled(musb))
  155. dsps_writel(reg_base, wrp->coreintr_set,
  156. (1 << wrp->drvvbus) << wrp->usb_shift);
  157. #else
  158. return 0;
  159. #endif
  160. }
  161. /**
  162. * dsps_musb_disable - disable HDRC and flush interrupts
  163. */
  164. static void dsps_musb_disable(struct musb *musb)
  165. {
  166. #ifndef __UBOOT__
  167. struct device *dev = musb->controller;
  168. struct platform_device *pdev = to_platform_device(dev->parent);
  169. struct dsps_glue *glue = platform_get_drvdata(pdev);
  170. const struct dsps_musb_wrapper *wrp = glue->wrp;
  171. void __iomem *reg_base = musb->ctrl_base;
  172. dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
  173. dsps_writel(reg_base, wrp->epintr_clear,
  174. wrp->txep_bitmap | wrp->rxep_bitmap);
  175. dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
  176. dsps_writel(reg_base, wrp->eoi, 0);
  177. #endif
  178. }
  179. #ifndef __UBOOT__
  180. static void otg_timer(unsigned long _musb)
  181. {
  182. struct musb *musb = (void *)_musb;
  183. void __iomem *mregs = musb->mregs;
  184. struct device *dev = musb->controller;
  185. struct platform_device *pdev = to_platform_device(dev->parent);
  186. struct dsps_glue *glue = platform_get_drvdata(pdev);
  187. const struct dsps_musb_wrapper *wrp = glue->wrp;
  188. u8 devctl;
  189. unsigned long flags;
  190. /*
  191. * We poll because DSPS IP's won't expose several OTG-critical
  192. * status change events (from the transceiver) otherwise.
  193. */
  194. devctl = dsps_readb(mregs, MUSB_DEVCTL);
  195. dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
  196. otg_state_string(musb->xceiv->state));
  197. spin_lock_irqsave(&musb->lock, flags);
  198. switch (musb->xceiv->state) {
  199. case OTG_STATE_A_WAIT_BCON:
  200. devctl &= ~MUSB_DEVCTL_SESSION;
  201. dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  202. devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
  203. if (devctl & MUSB_DEVCTL_BDEVICE) {
  204. musb->xceiv->state = OTG_STATE_B_IDLE;
  205. MUSB_DEV_MODE(musb);
  206. } else {
  207. musb->xceiv->state = OTG_STATE_A_IDLE;
  208. MUSB_HST_MODE(musb);
  209. }
  210. break;
  211. case OTG_STATE_A_WAIT_VFALL:
  212. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  213. dsps_writel(musb->ctrl_base, wrp->coreintr_set,
  214. MUSB_INTR_VBUSERROR << wrp->usb_shift);
  215. break;
  216. case OTG_STATE_B_IDLE:
  217. if (!is_peripheral_enabled(musb))
  218. break;
  219. devctl = dsps_readb(mregs, MUSB_DEVCTL);
  220. if (devctl & MUSB_DEVCTL_BDEVICE)
  221. mod_timer(&glue->timer,
  222. jiffies + wrp->poll_seconds * HZ);
  223. else
  224. musb->xceiv->state = OTG_STATE_A_IDLE;
  225. break;
  226. default:
  227. break;
  228. }
  229. spin_unlock_irqrestore(&musb->lock, flags);
  230. }
  231. static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
  232. {
  233. struct device *dev = musb->controller;
  234. struct platform_device *pdev = to_platform_device(dev->parent);
  235. struct dsps_glue *glue = platform_get_drvdata(pdev);
  236. static unsigned long last_timer;
  237. if (!is_otg_enabled(musb))
  238. return;
  239. if (timeout == 0)
  240. timeout = jiffies + msecs_to_jiffies(3);
  241. /* Never idle if active, or when VBUS timeout is not set as host */
  242. if (musb->is_active || (musb->a_wait_bcon == 0 &&
  243. musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
  244. dev_dbg(musb->controller, "%s active, deleting timer\n",
  245. otg_state_string(musb->xceiv->state));
  246. del_timer(&glue->timer);
  247. last_timer = jiffies;
  248. return;
  249. }
  250. if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
  251. dev_dbg(musb->controller,
  252. "Longer idle timer already pending, ignoring...\n");
  253. return;
  254. }
  255. last_timer = timeout;
  256. dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
  257. otg_state_string(musb->xceiv->state),
  258. jiffies_to_msecs(timeout - jiffies));
  259. mod_timer(&glue->timer, timeout);
  260. }
  261. #endif
  262. static irqreturn_t dsps_interrupt(int irq, void *hci)
  263. {
  264. struct musb *musb = hci;
  265. void __iomem *reg_base = musb->ctrl_base;
  266. #ifndef __UBOOT__
  267. struct device *dev = musb->controller;
  268. struct platform_device *pdev = to_platform_device(dev->parent);
  269. struct dsps_glue *glue = platform_get_drvdata(pdev);
  270. const struct dsps_musb_wrapper *wrp = glue->wrp;
  271. #else
  272. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  273. #endif
  274. unsigned long flags;
  275. irqreturn_t ret = IRQ_NONE;
  276. u32 epintr, usbintr;
  277. spin_lock_irqsave(&musb->lock, flags);
  278. /* Get endpoint interrupts */
  279. epintr = dsps_readl(reg_base, wrp->epintr_status);
  280. musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
  281. musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
  282. if (epintr)
  283. dsps_writel(reg_base, wrp->epintr_status, epintr);
  284. /* Get usb core interrupts */
  285. usbintr = dsps_readl(reg_base, wrp->coreintr_status);
  286. if (!usbintr && !epintr)
  287. goto eoi;
  288. musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
  289. if (usbintr)
  290. dsps_writel(reg_base, wrp->coreintr_status, usbintr);
  291. dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
  292. usbintr, epintr);
  293. #ifndef __UBOOT__
  294. /*
  295. * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
  296. * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
  297. * switch appropriately between halves of the OTG state machine.
  298. * Managing DEVCTL.SESSION per Mentor docs requires that we know its
  299. * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
  300. * Also, DRVVBUS pulses for SRP (but not at 5V) ...
  301. */
  302. if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
  303. pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
  304. if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
  305. int drvvbus = dsps_readl(reg_base, wrp->status);
  306. void __iomem *mregs = musb->mregs;
  307. u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
  308. int err;
  309. err = is_host_enabled(musb) && (musb->int_usb &
  310. MUSB_INTR_VBUSERROR);
  311. if (err) {
  312. /*
  313. * The Mentor core doesn't debounce VBUS as needed
  314. * to cope with device connect current spikes. This
  315. * means it's not uncommon for bus-powered devices
  316. * to get VBUS errors during enumeration.
  317. *
  318. * This is a workaround, but newer RTL from Mentor
  319. * seems to allow a better one: "re"-starting sessions
  320. * without waiting for VBUS to stop registering in
  321. * devctl.
  322. */
  323. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  324. musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
  325. mod_timer(&glue->timer,
  326. jiffies + wrp->poll_seconds * HZ);
  327. WARNING("VBUS error workaround (delay coming)\n");
  328. } else if (is_host_enabled(musb) && drvvbus) {
  329. musb->is_active = 1;
  330. MUSB_HST_MODE(musb);
  331. musb->xceiv->otg->default_a = 1;
  332. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  333. del_timer(&glue->timer);
  334. } else {
  335. musb->is_active = 0;
  336. MUSB_DEV_MODE(musb);
  337. musb->xceiv->otg->default_a = 0;
  338. musb->xceiv->state = OTG_STATE_B_IDLE;
  339. }
  340. /* NOTE: this must complete power-on within 100 ms. */
  341. dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
  342. drvvbus ? "on" : "off",
  343. otg_state_string(musb->xceiv->state),
  344. err ? " ERROR" : "",
  345. devctl);
  346. ret = IRQ_HANDLED;
  347. }
  348. #endif
  349. if (musb->int_tx || musb->int_rx || musb->int_usb)
  350. ret |= musb_interrupt(musb);
  351. eoi:
  352. /* EOI needs to be written for the IRQ to be re-asserted. */
  353. if (ret == IRQ_HANDLED || epintr || usbintr)
  354. dsps_writel(reg_base, wrp->eoi, 1);
  355. #ifndef __UBOOT__
  356. /* Poll for ID change */
  357. if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
  358. mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
  359. #endif
  360. spin_unlock_irqrestore(&musb->lock, flags);
  361. return ret;
  362. }
  363. static int dsps_musb_init(struct musb *musb)
  364. {
  365. #ifndef __UBOOT__
  366. struct device *dev = musb->controller;
  367. struct musb_hdrc_platform_data *plat = dev->platform_data;
  368. struct platform_device *pdev = to_platform_device(dev->parent);
  369. struct dsps_glue *glue = platform_get_drvdata(pdev);
  370. const struct dsps_musb_wrapper *wrp = glue->wrp;
  371. struct omap_musb_board_data *data = plat->board_data;
  372. #else
  373. struct omap_musb_board_data *data =
  374. (struct omap_musb_board_data *)musb->controller;
  375. const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
  376. #endif
  377. void __iomem *reg_base = musb->ctrl_base;
  378. u32 rev, val;
  379. int status;
  380. /* mentor core register starts at offset of 0x400 from musb base */
  381. musb->mregs += wrp->musb_core_offset;
  382. #ifndef __UBOOT__
  383. /* NOP driver needs change if supporting dual instance */
  384. usb_nop_xceiv_register();
  385. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  386. if (IS_ERR_OR_NULL(musb->xceiv))
  387. return -ENODEV;
  388. #endif
  389. /* Returns zero if e.g. not clocked */
  390. rev = dsps_readl(reg_base, wrp->revision);
  391. if (!rev) {
  392. status = -ENODEV;
  393. goto err0;
  394. }
  395. #ifndef __UBOOT__
  396. if (is_host_enabled(musb))
  397. setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
  398. #endif
  399. /* Reset the musb */
  400. dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
  401. /* Start the on-chip PHY and its PLL. */
  402. if (data && data->set_phy_power)
  403. data->set_phy_power(data->dev, 1);
  404. musb->isr = dsps_interrupt;
  405. /* reset the otgdisable bit, needed for host mode to work */
  406. val = dsps_readl(reg_base, wrp->phy_utmi);
  407. val &= ~(1 << wrp->otg_disable);
  408. dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
  409. /* clear level interrupt */
  410. dsps_writel(reg_base, wrp->eoi, 0);
  411. return 0;
  412. err0:
  413. #ifndef __UBOOT__
  414. usb_put_phy(musb->xceiv);
  415. usb_nop_xceiv_unregister();
  416. #endif
  417. return status;
  418. }
  419. static int dsps_musb_exit(struct musb *musb)
  420. {
  421. #ifndef __UBOOT__
  422. struct device *dev = musb->controller;
  423. struct musb_hdrc_platform_data *plat = dev->platform_data;
  424. struct omap_musb_board_data *data = plat->board_data;
  425. struct platform_device *pdev = to_platform_device(dev->parent);
  426. struct dsps_glue *glue = platform_get_drvdata(pdev);
  427. #else
  428. struct omap_musb_board_data *data =
  429. (struct omap_musb_board_data *)musb->controller;
  430. #endif
  431. #ifndef __UBOOT__
  432. if (is_host_enabled(musb))
  433. del_timer_sync(&glue->timer);
  434. #endif
  435. /* Shutdown the on-chip PHY and its PLL. */
  436. if (data && data->set_phy_power)
  437. data->set_phy_power(data->dev, 0);
  438. #ifndef __UBOOT__
  439. /* NOP driver needs change if supporting dual instance */
  440. usb_put_phy(musb->xceiv);
  441. usb_nop_xceiv_unregister();
  442. #endif
  443. return 0;
  444. }
  445. #ifndef __UBOOT__
  446. static struct musb_platform_ops dsps_ops = {
  447. #else
  448. struct musb_platform_ops musb_dsps_ops = {
  449. #endif
  450. .init = dsps_musb_init,
  451. .exit = dsps_musb_exit,
  452. .enable = dsps_musb_enable,
  453. .disable = dsps_musb_disable,
  454. #ifndef __UBOOT__
  455. .try_idle = dsps_musb_try_idle,
  456. #endif
  457. };
  458. #ifndef __UBOOT__
  459. static u64 musb_dmamask = DMA_BIT_MASK(32);
  460. #endif
  461. #ifndef __UBOOT__
  462. static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
  463. {
  464. struct device *dev = glue->dev;
  465. struct platform_device *pdev = to_platform_device(dev);
  466. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  467. struct platform_device *musb;
  468. struct resource *res;
  469. struct resource resources[2];
  470. char res_name[10];
  471. int ret;
  472. /* get memory resource */
  473. sprintf(res_name, "musb%d", id);
  474. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
  475. if (!res) {
  476. dev_err(dev, "%s get mem resource failed\n", res_name);
  477. ret = -ENODEV;
  478. goto err0;
  479. }
  480. res->parent = NULL;
  481. resources[0] = *res;
  482. /* get irq resource */
  483. sprintf(res_name, "musb%d-irq", id);
  484. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
  485. if (!res) {
  486. dev_err(dev, "%s get irq resource failed\n", res_name);
  487. ret = -ENODEV;
  488. goto err0;
  489. }
  490. res->parent = NULL;
  491. resources[1] = *res;
  492. resources[1].name = "mc";
  493. /* allocate the child platform device */
  494. musb = platform_device_alloc("musb-hdrc", -1);
  495. if (!musb) {
  496. dev_err(dev, "failed to allocate musb device\n");
  497. ret = -ENOMEM;
  498. goto err0;
  499. }
  500. musb->dev.parent = dev;
  501. musb->dev.dma_mask = &musb_dmamask;
  502. musb->dev.coherent_dma_mask = musb_dmamask;
  503. glue->musb = musb;
  504. pdata->platform_ops = &dsps_ops;
  505. ret = platform_device_add_resources(musb, resources, 2);
  506. if (ret) {
  507. dev_err(dev, "failed to add resources\n");
  508. goto err1;
  509. }
  510. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  511. if (ret) {
  512. dev_err(dev, "failed to add platform_data\n");
  513. goto err1;
  514. }
  515. ret = platform_device_add(musb);
  516. if (ret) {
  517. dev_err(dev, "failed to register musb device\n");
  518. goto err1;
  519. }
  520. return 0;
  521. err1:
  522. platform_device_put(musb);
  523. err0:
  524. return ret;
  525. }
  526. static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
  527. {
  528. platform_device_del(glue->musb);
  529. platform_device_put(glue->musb);
  530. }
  531. static int __devinit dsps_probe(struct platform_device *pdev)
  532. {
  533. const struct platform_device_id *id = platform_get_device_id(pdev);
  534. const struct dsps_musb_wrapper *wrp =
  535. (struct dsps_musb_wrapper *)id->driver_data;
  536. struct dsps_glue *glue;
  537. struct resource *iomem;
  538. int ret;
  539. /* allocate glue */
  540. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  541. if (!glue) {
  542. dev_err(&pdev->dev, "unable to allocate glue memory\n");
  543. ret = -ENOMEM;
  544. goto err0;
  545. }
  546. /* get memory resource */
  547. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  548. if (!iomem) {
  549. dev_err(&pdev->dev, "failed to get usbss mem resource\n");
  550. ret = -ENODEV;
  551. goto err1;
  552. }
  553. glue->dev = &pdev->dev;
  554. glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
  555. if (!glue->wrp) {
  556. dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
  557. ret = -ENOMEM;
  558. goto err1;
  559. }
  560. platform_set_drvdata(pdev, glue);
  561. /* enable the usbss clocks */
  562. pm_runtime_enable(&pdev->dev);
  563. ret = pm_runtime_get_sync(&pdev->dev);
  564. if (ret < 0) {
  565. dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
  566. goto err2;
  567. }
  568. /* create the child platform device for first instances of musb */
  569. ret = dsps_create_musb_pdev(glue, 0);
  570. if (ret != 0) {
  571. dev_err(&pdev->dev, "failed to create child pdev\n");
  572. goto err3;
  573. }
  574. return 0;
  575. err3:
  576. pm_runtime_put(&pdev->dev);
  577. err2:
  578. pm_runtime_disable(&pdev->dev);
  579. kfree(glue->wrp);
  580. err1:
  581. kfree(glue);
  582. err0:
  583. return ret;
  584. }
  585. static int __devexit dsps_remove(struct platform_device *pdev)
  586. {
  587. struct dsps_glue *glue = platform_get_drvdata(pdev);
  588. /* delete the child platform device */
  589. dsps_delete_musb_pdev(glue);
  590. /* disable usbss clocks */
  591. pm_runtime_put(&pdev->dev);
  592. pm_runtime_disable(&pdev->dev);
  593. kfree(glue->wrp);
  594. kfree(glue);
  595. return 0;
  596. }
  597. #ifdef CONFIG_PM_SLEEP
  598. static int dsps_suspend(struct device *dev)
  599. {
  600. struct musb_hdrc_platform_data *plat = dev->platform_data;
  601. struct omap_musb_board_data *data = plat->board_data;
  602. /* Shutdown the on-chip PHY and its PLL. */
  603. if (data && data->set_phy_power)
  604. data->set_phy_power(data->dev, 0);
  605. return 0;
  606. }
  607. static int dsps_resume(struct device *dev)
  608. {
  609. struct musb_hdrc_platform_data *plat = dev->platform_data;
  610. struct omap_musb_board_data *data = plat->board_data;
  611. /* Start the on-chip PHY and its PLL. */
  612. if (data && data->set_phy_power)
  613. data->set_phy_power(data->dev, 1);
  614. return 0;
  615. }
  616. #endif
  617. static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
  618. #endif
  619. #ifndef __UBOOT__
  620. static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
  621. {
  622. .name = "musb-ti81xx",
  623. .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
  624. },
  625. { }, /* Terminating Entry */
  626. };
  627. MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
  628. static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
  629. { .compatible = "musb-ti81xx", },
  630. { .compatible = "ti,ti81xx-musb", },
  631. { .compatible = "ti,am335x-musb", },
  632. { },
  633. };
  634. MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
  635. static struct platform_driver dsps_usbss_driver = {
  636. .probe = dsps_probe,
  637. .remove = __devexit_p(dsps_remove),
  638. .driver = {
  639. .name = "musb-dsps",
  640. .pm = &dsps_pm_ops,
  641. .of_match_table = musb_dsps_of_match,
  642. },
  643. .id_table = musb_dsps_id_table,
  644. };
  645. MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
  646. MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
  647. MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
  648. MODULE_LICENSE("GPL v2");
  649. static int __init dsps_init(void)
  650. {
  651. return platform_driver_register(&dsps_usbss_driver);
  652. }
  653. subsys_initcall(dsps_init);
  654. static void __exit dsps_exit(void)
  655. {
  656. platform_driver_unregister(&dsps_usbss_driver);
  657. }
  658. module_exit(dsps_exit);
  659. #endif