musb_dma.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * MUSB OTG driver DMA controller abstraction
  4. *
  5. * Copyright 2005 Mentor Graphics Corporation
  6. * Copyright (C) 2005-2006 by Texas Instruments
  7. * Copyright (C) 2006-2007 Nokia Corporation
  8. */
  9. #ifndef __MUSB_DMA_H__
  10. #define __MUSB_DMA_H__
  11. struct musb_hw_ep;
  12. /*
  13. * DMA Controller Abstraction
  14. *
  15. * DMA Controllers are abstracted to allow use of a variety of different
  16. * implementations of DMA, as allowed by the Inventra USB cores. On the
  17. * host side, usbcore sets up the DMA mappings and flushes caches; on the
  18. * peripheral side, the gadget controller driver does. Responsibilities
  19. * of a DMA controller driver include:
  20. *
  21. * - Handling the details of moving multiple USB packets
  22. * in cooperation with the Inventra USB core, including especially
  23. * the correct RX side treatment of short packets and buffer-full
  24. * states (both of which terminate transfers).
  25. *
  26. * - Knowing the correlation between dma channels and the
  27. * Inventra core's local endpoint resources and data direction.
  28. *
  29. * - Maintaining a list of allocated/available channels.
  30. *
  31. * - Updating channel status on interrupts,
  32. * whether shared with the Inventra core or separate.
  33. */
  34. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  35. #ifndef CONFIG_USB_MUSB_PIO_ONLY
  36. #define is_dma_capable() (1)
  37. #else
  38. #define is_dma_capable() (0)
  39. #endif
  40. #ifdef CONFIG_USB_TI_CPPI_DMA
  41. #define is_cppi_enabled() 1
  42. #else
  43. #define is_cppi_enabled() 0
  44. #endif
  45. #ifdef CONFIG_USB_TUSB_OMAP_DMA
  46. #define tusb_dma_omap() 1
  47. #else
  48. #define tusb_dma_omap() 0
  49. #endif
  50. /*
  51. * DMA channel status ... updated by the dma controller driver whenever that
  52. * status changes, and protected by the overall controller spinlock.
  53. */
  54. enum dma_channel_status {
  55. /* unallocated */
  56. MUSB_DMA_STATUS_UNKNOWN,
  57. /* allocated ... but not busy, no errors */
  58. MUSB_DMA_STATUS_FREE,
  59. /* busy ... transactions are active */
  60. MUSB_DMA_STATUS_BUSY,
  61. /* transaction(s) aborted due to ... dma or memory bus error */
  62. MUSB_DMA_STATUS_BUS_ABORT,
  63. /* transaction(s) aborted due to ... core error or USB fault */
  64. MUSB_DMA_STATUS_CORE_ABORT
  65. };
  66. struct dma_controller;
  67. /**
  68. * struct dma_channel - A DMA channel.
  69. * @private_data: channel-private data
  70. * @max_len: the maximum number of bytes the channel can move in one
  71. * transaction (typically representing many USB maximum-sized packets)
  72. * @actual_len: how many bytes have been transferred
  73. * @status: current channel status (updated e.g. on interrupt)
  74. * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
  75. *
  76. * channels are associated with an endpoint for the duration of at least
  77. * one usb transfer.
  78. */
  79. struct dma_channel {
  80. void *private_data;
  81. /* FIXME not void* private_data, but a dma_controller * */
  82. size_t max_len;
  83. size_t actual_len;
  84. enum dma_channel_status status;
  85. bool desired_mode;
  86. };
  87. /*
  88. * dma_channel_status - return status of dma channel
  89. * @c: the channel
  90. *
  91. * Returns the software's view of the channel status. If that status is BUSY
  92. * then it's possible that the hardware has completed (or aborted) a transfer,
  93. * so the driver needs to update that status.
  94. */
  95. static inline enum dma_channel_status
  96. dma_channel_status(struct dma_channel *c)
  97. {
  98. return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
  99. }
  100. /**
  101. * struct dma_controller - A DMA Controller.
  102. * @start: call this to start a DMA controller;
  103. * return 0 on success, else negative errno
  104. * @stop: call this to stop a DMA controller
  105. * return 0 on success, else negative errno
  106. * @channel_alloc: call this to allocate a DMA channel
  107. * @channel_release: call this to release a DMA channel
  108. * @channel_abort: call this to abort a pending DMA transaction,
  109. * returning it to FREE (but allocated) state
  110. *
  111. * Controllers manage dma channels.
  112. */
  113. struct dma_controller {
  114. int (*start)(struct dma_controller *);
  115. int (*stop)(struct dma_controller *);
  116. struct dma_channel *(*channel_alloc)(struct dma_controller *,
  117. struct musb_hw_ep *, u8 is_tx);
  118. void (*channel_release)(struct dma_channel *);
  119. int (*channel_program)(struct dma_channel *channel,
  120. u16 maxpacket, u8 mode,
  121. dma_addr_t dma_addr,
  122. u32 length);
  123. int (*channel_abort)(struct dma_channel *);
  124. int (*is_compatible)(struct dma_channel *channel,
  125. u16 maxpacket,
  126. void *buf, u32 length);
  127. };
  128. /* called after channel_program(), may indicate a fault */
  129. extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
  130. extern struct dma_controller *__init
  131. dma_controller_create(struct musb *, void __iomem *);
  132. extern void dma_controller_destroy(struct dma_controller *);
  133. #endif /* __MUSB_DMA_H__ */