pxa27x_udc.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * PXA27x USB device driver for u-boot.
  4. *
  5. * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
  6. * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
  7. * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com>
  8. */
  9. #include <common.h>
  10. #include <asm/arch/hardware.h>
  11. #include <asm/byteorder.h>
  12. #include <asm/io.h>
  13. #include <usbdevice.h>
  14. #include <linux/delay.h>
  15. #include <usb/pxa27x_udc.h>
  16. #include <usb/udc.h>
  17. #include "ep0.h"
  18. /* number of endpoints on this UDC */
  19. #define UDC_MAX_ENDPOINTS 24
  20. static struct urb *ep0_urb;
  21. static struct usb_device_instance *udc_device;
  22. static int ep0state = EP0_IDLE;
  23. #ifdef USBDDBG
  24. static void udc_dump_buffer(char *name, u8 *buf, int len)
  25. {
  26. usbdbg("%s - buf %p, len %d", name, buf, len);
  27. print_buffer(0, buf, 1, len, 0);
  28. }
  29. #else
  30. #define udc_dump_buffer(name, buf, len) /* void */
  31. #endif
  32. static inline void udc_ack_int_UDCCR(int mask)
  33. {
  34. writel(readl(USIR1) | mask, USIR1);
  35. }
  36. /*
  37. * If the endpoint has an active tx_urb, then the next packet of data from the
  38. * URB is written to the tx FIFO.
  39. * The total amount of data in the urb is given by urb->actual_length.
  40. * The maximum amount of data that can be sent in any one packet is given by
  41. * endpoint->tx_packetSize.
  42. * The number of data bytes from this URB that have already been transmitted
  43. * is given by endpoint->sent.
  44. * endpoint->last is updated by this routine with the number of data bytes
  45. * transmitted in this packet.
  46. */
  47. static int udc_write_urb(struct usb_endpoint_instance *endpoint)
  48. {
  49. struct urb *urb = endpoint->tx_urb;
  50. int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  51. u32 *data32 = (u32 *) urb->buffer;
  52. u8 *data8 = (u8 *) urb->buffer;
  53. unsigned int i, n, w, b, is_short;
  54. int timeout = 2000; /* 2ms */
  55. if (!urb || !urb->actual_length)
  56. return -1;
  57. n = min_t(unsigned int, urb->actual_length - endpoint->sent,
  58. endpoint->tx_packetSize);
  59. if (n <= 0)
  60. return -1;
  61. usbdbg("write urb on ep %d", ep_num);
  62. #if defined(USBDDBG) && defined(USBDPARANOIA)
  63. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  64. urb->buffer, urb->buffer_length, urb->actual_length);
  65. usbdbg("endpoint: sent %d, tx_packetSize %d, last %d",
  66. endpoint->sent, endpoint->tx_packetSize, endpoint->last);
  67. #endif
  68. is_short = n != endpoint->tx_packetSize;
  69. w = n / 4;
  70. b = n % 4;
  71. usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b);
  72. udc_dump_buffer("urb write", data8 + endpoint->sent, n);
  73. /* Prepare for data send */
  74. if (ep_num)
  75. writel(UDCCSR_PC ,UDCCSN(ep_num));
  76. for (i = 0; i < w; i++)
  77. writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num));
  78. for (i = 0; i < b; i++)
  79. writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num));
  80. /* Set "Packet Complete" if less data then tx_packetSize */
  81. if (is_short)
  82. writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num));
  83. /* Wait for data sent */
  84. if (ep_num) {
  85. while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) {
  86. if (timeout-- == 0)
  87. return -1;
  88. else
  89. udelay(1);
  90. }
  91. }
  92. endpoint->last = n;
  93. if (ep_num) {
  94. usbd_tx_complete(endpoint);
  95. } else {
  96. endpoint->sent += n;
  97. endpoint->last -= n;
  98. }
  99. if (endpoint->sent >= urb->actual_length) {
  100. urb->actual_length = 0;
  101. endpoint->sent = 0;
  102. endpoint->last = 0;
  103. }
  104. if ((endpoint->sent >= urb->actual_length) && (!ep_num)) {
  105. usbdbg("ep0 IN stage done");
  106. if (is_short)
  107. ep0state = EP0_IDLE;
  108. else
  109. ep0state = EP0_XFER_COMPLETE;
  110. }
  111. return 0;
  112. }
  113. static int udc_read_urb(struct usb_endpoint_instance *endpoint)
  114. {
  115. struct urb *urb = endpoint->rcv_urb;
  116. int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  117. u32 *data32 = (u32 *) urb->buffer;
  118. unsigned int i, n;
  119. usbdbg("read urb on ep %d", ep_num);
  120. #if defined(USBDDBG) && defined(USBDPARANOIA)
  121. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  122. urb->buffer, urb->buffer_length, urb->actual_length);
  123. usbdbg("endpoint: rcv_packetSize %d",
  124. endpoint->rcv_packetSize);
  125. #endif
  126. if (readl(UDCCSN(ep_num)) & UDCCSR_BNE)
  127. n = readl(UDCBCN(ep_num)) & 0x3ff;
  128. else /* zlp */
  129. n = 0;
  130. usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : "");
  131. for (i = 0; i < n; i += 4)
  132. data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num));
  133. udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n);
  134. usbd_rcv_complete(endpoint, n, 0);
  135. return 0;
  136. }
  137. static int udc_read_urb_ep0(void)
  138. {
  139. u32 *data32 = (u32 *) ep0_urb->buffer;
  140. u8 *data8 = (u8 *) ep0_urb->buffer;
  141. unsigned int i, n, w, b;
  142. usbdbg("read urb on ep 0");
  143. #if defined(USBDDBG) && defined(USBDPARANOIA)
  144. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  145. ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length);
  146. #endif
  147. n = readl(UDCBCR0);
  148. w = n / 4;
  149. b = n % 4;
  150. for (i = 0; i < w; i++) {
  151. data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0));
  152. /* ep0_urb->actual_length += 4; */
  153. }
  154. for (i = 0; i < b; i++) {
  155. data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0));
  156. /* ep0_urb->actual_length++; */
  157. }
  158. ep0_urb->actual_length += n;
  159. udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length);
  160. writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0);
  161. if (ep0_urb->actual_length == ep0_urb->device_request.wLength)
  162. return 1;
  163. return 0;
  164. }
  165. static void udc_handle_ep0(struct usb_endpoint_instance *endpoint)
  166. {
  167. u32 udccsr0 = readl(UDCCSR0);
  168. u32 *data = (u32 *) &ep0_urb->device_request;
  169. int i;
  170. usbdbg("udccsr0 %x", udccsr0);
  171. /* Clear stall status */
  172. if (udccsr0 & UDCCSR0_SST) {
  173. usberr("clear stall status");
  174. writel(UDCCSR0_SST, UDCCSR0);
  175. ep0state = EP0_IDLE;
  176. }
  177. /* previous request unfinished? non-error iff back-to-back ... */
  178. if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE)
  179. ep0state = EP0_IDLE;
  180. switch (ep0state) {
  181. case EP0_IDLE:
  182. udccsr0 = readl(UDCCSR0);
  183. /* Start control request? */
  184. if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE))
  185. == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) {
  186. /* Read SETUP packet.
  187. * SETUP packet size is 8 bytes (aka 2 words)
  188. */
  189. usbdbg("try reading SETUP packet");
  190. for (i = 0; i < 2; i++) {
  191. if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) {
  192. usberr("setup packet too short:%d", i);
  193. goto stall;
  194. }
  195. data[i] = readl(UDCDR0);
  196. }
  197. writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0);
  198. if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) {
  199. usberr("setup packet too long");
  200. goto stall;
  201. }
  202. udc_dump_buffer("ep0 setup read", (u8 *) data, 8);
  203. if (ep0_urb->device_request.wLength == 0) {
  204. usbdbg("Zero Data control Packet\n");
  205. if (ep0_recv_setup(ep0_urb)) {
  206. usberr("Invalid Setup Packet\n");
  207. udc_dump_buffer("ep0 setup read",
  208. (u8 *)data, 8);
  209. goto stall;
  210. }
  211. writel(UDCCSR0_IPR, UDCCSR0);
  212. ep0state = EP0_IDLE;
  213. } else {
  214. /* Check direction */
  215. if ((ep0_urb->device_request.bmRequestType &
  216. USB_REQ_DIRECTION_MASK)
  217. == USB_REQ_HOST2DEVICE) {
  218. ep0state = EP0_OUT_DATA;
  219. ep0_urb->buffer =
  220. (u8 *)ep0_urb->buffer_data;
  221. ep0_urb->buffer_length =
  222. sizeof(ep0_urb->buffer_data);
  223. ep0_urb->actual_length = 0;
  224. writel(UDCCSR0_IPR, UDCCSR0);
  225. } else {
  226. /* The ep0_recv_setup function has
  227. * already placed our response packet
  228. * data in ep0_urb->buffer and the
  229. * packet length in
  230. * ep0_urb->actual_length.
  231. */
  232. if (ep0_recv_setup(ep0_urb)) {
  233. stall:
  234. usberr("Invalid setup packet");
  235. udc_dump_buffer("ep0 setup read"
  236. , (u8 *) data, 8);
  237. ep0state = EP0_IDLE;
  238. writel(UDCCSR0_SA |
  239. UDCCSR0_OPC | UDCCSR0_FST |
  240. UDCCS0_FTF, UDCCSR0);
  241. return;
  242. }
  243. endpoint->tx_urb = ep0_urb;
  244. endpoint->sent = 0;
  245. usbdbg("EP0_IN_DATA");
  246. ep0state = EP0_IN_DATA;
  247. if (udc_write_urb(endpoint) < 0)
  248. goto stall;
  249. }
  250. }
  251. return;
  252. } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA))
  253. == (UDCCSR0_OPC|UDCCSR0_SA)) {
  254. usberr("Setup Active but no data. Stalling ....\n");
  255. goto stall;
  256. } else {
  257. usbdbg("random early IRQs");
  258. /* Some random early IRQs:
  259. * - we acked FST
  260. * - IPR cleared
  261. * - OPC got set, without SA (likely status stage)
  262. */
  263. writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0);
  264. }
  265. break;
  266. case EP0_OUT_DATA:
  267. if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) {
  268. if (udc_read_urb_ep0()) {
  269. read_complete:
  270. ep0state = EP0_IDLE;
  271. if (ep0_recv_setup(ep0_urb)) {
  272. /* Not a setup packet, stall next
  273. * EP0 transaction
  274. */
  275. udc_dump_buffer("ep0 setup read",
  276. (u8 *) data, 8);
  277. usberr("can't parse setup packet\n");
  278. goto stall;
  279. }
  280. }
  281. } else if (!(udccsr0 & UDCCSR0_OPC) &&
  282. !(udccsr0 & UDCCSR0_IPR)) {
  283. if (ep0_urb->device_request.wLength ==
  284. ep0_urb->actual_length)
  285. goto read_complete;
  286. usberr("Premature Status\n");
  287. ep0state = EP0_IDLE;
  288. }
  289. break;
  290. case EP0_IN_DATA:
  291. /* GET_DESCRIPTOR etc */
  292. if (udccsr0 & UDCCSR0_OPC) {
  293. writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0);
  294. usberr("ep0in premature status");
  295. ep0state = EP0_IDLE;
  296. } else {
  297. /* irq was IPR clearing */
  298. if (udc_write_urb(endpoint) < 0) {
  299. usberr("ep0_write_error\n");
  300. goto stall;
  301. }
  302. }
  303. break;
  304. case EP0_XFER_COMPLETE:
  305. writel(UDCCSR0_IPR, UDCCSR0);
  306. ep0state = EP0_IDLE;
  307. break;
  308. default:
  309. usbdbg("Default\n");
  310. }
  311. writel(USIR0_IR0, USIR0);
  312. }
  313. static void udc_handle_ep(struct usb_endpoint_instance *endpoint)
  314. {
  315. int ep_addr = endpoint->endpoint_address;
  316. int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
  317. int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
  318. u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN);
  319. if (flags)
  320. writel(flags, UDCCSN(ep_num));
  321. if (ep_isout)
  322. udc_read_urb(endpoint);
  323. else
  324. udc_write_urb(endpoint);
  325. writel(UDCCSR_PC, UDCCSN(ep_num));
  326. }
  327. static void udc_state_changed(void)
  328. {
  329. writel(readl(UDCCR) | UDCCR_SMAC, UDCCR);
  330. usbdbg("New UDC settings are: conf %d - inter %d - alter %d",
  331. (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S,
  332. (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S,
  333. (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S);
  334. usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0);
  335. writel(UDCISR1_IRCC, UDCISR1);
  336. }
  337. void udc_irq(void)
  338. {
  339. int handled;
  340. struct usb_endpoint_instance *endpoint;
  341. int ep_num, i;
  342. u32 udcisr0;
  343. do {
  344. handled = 0;
  345. /* Suspend Interrupt Request */
  346. if (readl(USIR1) & UDCCR_SUSIR) {
  347. usbdbg("Suspend\n");
  348. udc_ack_int_UDCCR(UDCCR_SUSIR);
  349. handled = 1;
  350. ep0state = EP0_IDLE;
  351. }
  352. /* Resume Interrupt Request */
  353. if (readl(USIR1) & UDCCR_RESIR) {
  354. udc_ack_int_UDCCR(UDCCR_RESIR);
  355. handled = 1;
  356. usbdbg("USB resume\n");
  357. }
  358. if (readl(USIR1) & (1<<31)) {
  359. handled = 1;
  360. udc_state_changed();
  361. }
  362. /* Reset Interrupt Request */
  363. if (readl(USIR1) & UDCCR_RSTIR) {
  364. udc_ack_int_UDCCR(UDCCR_RSTIR);
  365. handled = 1;
  366. usbdbg("Reset\n");
  367. usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
  368. } else {
  369. if (readl(USIR0))
  370. usbdbg("UISR0: %x \n", readl(USIR0));
  371. if (readl(USIR0) & 0x2)
  372. writel(0x2, USIR0);
  373. /* Control traffic */
  374. if (readl(USIR0) & USIR0_IR0) {
  375. handled = 1;
  376. writel(USIR0_IR0, USIR0);
  377. udc_handle_ep0(udc_device->bus->endpoint_array);
  378. }
  379. endpoint = udc_device->bus->endpoint_array;
  380. for (i = 0; i < udc_device->bus->max_endpoints; i++) {
  381. ep_num = (endpoint[i].endpoint_address) &
  382. USB_ENDPOINT_NUMBER_MASK;
  383. if (!ep_num)
  384. continue;
  385. udcisr0 = readl(UDCISR0);
  386. if (udcisr0 &
  387. UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) {
  388. writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP),
  389. UDCISR0);
  390. udc_handle_ep(&endpoint[i]);
  391. }
  392. }
  393. }
  394. } while (handled);
  395. }
  396. /* The UDCCR reg contains mask and interrupt status bits,
  397. * so using '|=' isn't safe as it may ack an interrupt.
  398. */
  399. #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
  400. #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE)
  401. static inline void udc_set_mask_UDCCR(int mask)
  402. {
  403. writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR);
  404. }
  405. static inline void udc_clear_mask_UDCCR(int mask)
  406. {
  407. writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR);
  408. }
  409. static void pio_irq_enable(int ep_num)
  410. {
  411. if (ep_num < 16)
  412. writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0);
  413. else {
  414. ep_num -= 16;
  415. writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1);
  416. }
  417. }
  418. /*
  419. * udc_set_nak
  420. *
  421. * Allow upper layers to signal lower layers should not accept more RX data
  422. */
  423. void udc_set_nak(int ep_num)
  424. {
  425. /* TODO */
  426. }
  427. /*
  428. * udc_unset_nak
  429. *
  430. * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
  431. * Switch off NAKing on this endpoint to accept more data output from host.
  432. */
  433. void udc_unset_nak(int ep_num)
  434. {
  435. /* TODO */
  436. }
  437. int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
  438. {
  439. return udc_write_urb(endpoint);
  440. }
  441. /* Associate a physical endpoint with endpoint instance */
  442. void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
  443. struct usb_endpoint_instance *endpoint)
  444. {
  445. int ep_num, ep_addr, ep_isout, ep_type, ep_size;
  446. int config, interface, alternate;
  447. u32 tmp;
  448. usbdbg("setting up endpoint id %d", id);
  449. if (!endpoint) {
  450. usberr("endpoint void!");
  451. return;
  452. }
  453. ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  454. if (ep_num >= UDC_MAX_ENDPOINTS) {
  455. usberr("unable to setup ep %d!", ep_num);
  456. return;
  457. }
  458. pio_irq_enable(ep_num);
  459. if (ep_num == 0) {
  460. /* Done for ep0 */
  461. return;
  462. }
  463. config = 1;
  464. interface = 0;
  465. alternate = 0;
  466. usbdbg("config %d - interface %d - alternate %d",
  467. config, interface, alternate);
  468. ep_addr = endpoint->endpoint_address;
  469. ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
  470. ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
  471. ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes;
  472. ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize;
  473. usbdbg("addr %x, num %d, dir %s, type %s, packet size %d",
  474. ep_addr, ep_num,
  475. ep_isout ? "out" : "in",
  476. ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" :
  477. ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" :
  478. ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???",
  479. ep_size
  480. );
  481. /* Configure UDCCRx */
  482. tmp = 0;
  483. tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN;
  484. tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN;
  485. tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN;
  486. tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN;
  487. tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET;
  488. tmp |= ep_isout ? 0 : UDCCONR_ED;
  489. tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS;
  490. tmp |= UDCCONR_EE;
  491. writel(tmp, UDCCN(ep_num));
  492. usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num)));
  493. usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num)));
  494. }
  495. /* Connect the USB device to the bus */
  496. void udc_connect(void)
  497. {
  498. usbdbg("UDC connect");
  499. #ifdef CONFIG_USB_DEV_PULLUP_GPIO
  500. /* Turn on the USB connection by enabling the pullup resistor */
  501. writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO))
  502. | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO),
  503. GPDR(CONFIG_USB_DEV_PULLUP_GPIO));
  504. writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO));
  505. #else
  506. /* Host port 2 transceiver D+ pull up enable */
  507. writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR);
  508. #endif
  509. }
  510. /* Disconnect the USB device to the bus */
  511. void udc_disconnect(void)
  512. {
  513. usbdbg("UDC disconnect");
  514. #ifdef CONFIG_USB_DEV_PULLUP_GPIO
  515. /* Turn off the USB connection by disabling the pullup resistor */
  516. writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO));
  517. #else
  518. /* Host port 2 transceiver D+ pull up disable */
  519. writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR);
  520. #endif
  521. }
  522. /* Switch on the UDC */
  523. void udc_enable(struct usb_device_instance *device)
  524. {
  525. ep0state = EP0_IDLE;
  526. /* enable endpoint 0, A, B's Packet Complete Interrupt. */
  527. writel(0xffffffff, UDCICR0);
  528. writel(0xa8000000, UDCICR1);
  529. /* clear the interrupt status/control registers */
  530. writel(0xffffffff, UDCISR0);
  531. writel(0xffffffff, UDCISR1);
  532. /* set UDC-enable */
  533. udc_set_mask_UDCCR(UDCCR_UDE);
  534. udc_device = device;
  535. if (!ep0_urb)
  536. ep0_urb = usbd_alloc_urb(udc_device,
  537. udc_device->bus->endpoint_array);
  538. else
  539. usbinfo("ep0_urb %p already allocated", ep0_urb);
  540. usbdbg("UDC Enabled\n");
  541. }
  542. /* Need to check this again */
  543. void udc_disable(void)
  544. {
  545. usbdbg("disable UDC");
  546. udc_clear_mask_UDCCR(UDCCR_UDE);
  547. /* Disable clock for USB device */
  548. writel(readl(CKEN) & ~CKEN11_USB, CKEN);
  549. /* Free ep0 URB */
  550. if (ep0_urb) {
  551. usbd_dealloc_urb(ep0_urb);
  552. ep0_urb = NULL;
  553. }
  554. /* Reset device pointer */
  555. udc_device = NULL;
  556. }
  557. /* Allow udc code to do any additional startup */
  558. void udc_startup_events(struct usb_device_instance *device)
  559. {
  560. /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */
  561. usbd_device_event_irq(device, DEVICE_INIT, 0);
  562. /* The DEVICE_CREATE event puts the USB device in the state
  563. * STATE_ATTACHED */
  564. usbd_device_event_irq(device, DEVICE_CREATE, 0);
  565. /* Some USB controller driver implementations signal
  566. * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
  567. * DEVICE_HUB_CONFIGURED causes a transition to the state
  568. * STATE_POWERED, and DEVICE_RESET causes a transition to
  569. * the state STATE_DEFAULT.
  570. */
  571. udc_enable(device);
  572. }
  573. /* Initialize h/w stuff */
  574. int udc_init(void)
  575. {
  576. udc_device = NULL;
  577. usbdbg("PXA27x usbd start");
  578. /* Enable clock for USB device */
  579. writel(readl(CKEN) | CKEN11_USB, CKEN);
  580. /* Disable the UDC */
  581. udc_clear_mask_UDCCR(UDCCR_UDE);
  582. /* Disable IRQs: we don't use them */
  583. writel(0, UDCICR0);
  584. writel(0, UDCICR1);
  585. return 0;
  586. }