atmel_usba_udc.h 8.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Register definition for Atmel USBA high speed USB device controller
  4. * [Original from Linux kernel: drivers/usb/gadget/atmel_usba_udc.h]
  5. *
  6. * Copyright (C) 2005-2013 Atmel Corporation
  7. * Bo Shen <voice.shen@atmel.com>
  8. */
  9. #ifndef __LINUX_USB_GADGET_USBA_UDC_H__
  10. #define __LINUX_USB_GADGET_USBA_UDC_H__
  11. /* USB register offsets */
  12. #define USBA_CTRL 0x0000
  13. #define USBA_FNUM 0x0004
  14. #define USBA_INT_ENB 0x0010
  15. #define USBA_INT_STA 0x0014
  16. #define USBA_INT_CLR 0x0018
  17. #define USBA_EPT_RST 0x001c
  18. #define USBA_TST 0x00e0
  19. /* USB endpoint register offsets */
  20. #define USBA_EPT_CFG 0x0000
  21. #define USBA_EPT_CTL_ENB 0x0004
  22. #define USBA_EPT_CTL_DIS 0x0008
  23. #define USBA_EPT_CTL 0x000c
  24. #define USBA_EPT_SET_STA 0x0014
  25. #define USBA_EPT_CLR_STA 0x0018
  26. #define USBA_EPT_STA 0x001c
  27. /* USB DMA register offsets */
  28. #define USBA_DMA_NXT_DSC 0x0000
  29. #define USBA_DMA_ADDRESS 0x0004
  30. #define USBA_DMA_CONTROL 0x0008
  31. #define USBA_DMA_STATUS 0x000c
  32. /* Bitfields in CTRL */
  33. #define USBA_DEV_ADDR_OFFSET 0
  34. #define USBA_DEV_ADDR_SIZE 7
  35. #define USBA_FADDR_EN (1 << 7)
  36. #define USBA_EN_USBA (1 << 8)
  37. #define USBA_DETACH (1 << 9)
  38. #define USBA_REMOTE_WAKE_UP (1 << 10)
  39. #define USBA_PULLD_DIS (1 << 11)
  40. #define USBA_ENABLE_MASK (USBA_EN_USBA | USBA_PULLD_DIS)
  41. #define USBA_DISABLE_MASK USBA_DETACH
  42. /* Bitfields in FNUM */
  43. #define USBA_MICRO_FRAME_NUM_OFFSET 0
  44. #define USBA_MICRO_FRAME_NUM_SIZE 3
  45. #define USBA_FRAME_NUMBER_OFFSET 3
  46. #define USBA_FRAME_NUMBER_SIZE 11
  47. #define USBA_FRAME_NUM_ERROR (1 << 31)
  48. /* Bitfields in INT_ENB/INT_STA/INT_CLR */
  49. #define USBA_HIGH_SPEED (1 << 0)
  50. #define USBA_DET_SUSPEND (1 << 1)
  51. #define USBA_MICRO_SOF (1 << 2)
  52. #define USBA_SOF (1 << 3)
  53. #define USBA_END_OF_RESET (1 << 4)
  54. #define USBA_WAKE_UP (1 << 5)
  55. #define USBA_END_OF_RESUME (1 << 6)
  56. #define USBA_UPSTREAM_RESUME (1 << 7)
  57. #define USBA_EPT_INT_OFFSET 8
  58. #define USBA_EPT_INT_SIZE 16
  59. #define USBA_DMA_INT_OFFSET 24
  60. #define USBA_DMA_INT_SIZE 8
  61. /* Bitfields in EPT_RST */
  62. #define USBA_RST_OFFSET 0
  63. #define USBA_RST_SIZE 16
  64. /* Bitfields in USBA_TST */
  65. #define USBA_SPEED_CFG_OFFSET 0
  66. #define USBA_SPEED_CFG_SIZE 2
  67. #define USBA_TST_J_MODE (1 << 2)
  68. #define USBA_TST_K_MODE (1 << 3)
  69. #define USBA_TST_PKT_MODE (1 << 4)
  70. #define USBA_OPMODE2 (1 << 5)
  71. /* Bitfields in EPT_CFG */
  72. #define USBA_EPT_SIZE_OFFSET 0
  73. #define USBA_EPT_SIZE_SIZE 3
  74. #define USBA_EPT_DIR_IN (1 << 3)
  75. #define USBA_EPT_TYPE_OFFSET 4
  76. #define USBA_EPT_TYPE_SIZE 2
  77. #define USBA_BK_NUMBER_OFFSET 6
  78. #define USBA_BK_NUMBER_SIZE 2
  79. #define USBA_NB_TRANS_OFFSET 8
  80. #define USBA_NB_TRANS_SIZE 2
  81. #define USBA_EPT_MAPPED (1 << 31)
  82. /* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
  83. #define USBA_EPT_ENABLE (1 << 0)
  84. #define USBA_AUTO_VALID (1 << 1)
  85. #define USBA_INTDIS_DMA (1 << 3)
  86. #define USBA_NYET_DIS (1 << 4)
  87. #define USBA_DATAX_RX (1 << 6)
  88. #define USBA_MDATA_RX (1 << 7)
  89. /* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
  90. #define USBA_BUSY_BANK_IE (1 << 18)
  91. /* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
  92. #define USBA_FORCE_STALL (1 << 5)
  93. #define USBA_TOGGLE_CLR (1 << 6)
  94. #define USBA_TOGGLE_SEQ_OFFSET 6
  95. #define USBA_TOGGLE_SEQ_SIZE 2
  96. #define USBA_ERR_OVFLW (1 << 8)
  97. #define USBA_RX_BK_RDY (1 << 9)
  98. #define USBA_KILL_BANK (1 << 9)
  99. #define USBA_TX_COMPLETE (1 << 10)
  100. #define USBA_TX_PK_RDY (1 << 11)
  101. #define USBA_ISO_ERR_TRANS (1 << 11)
  102. #define USBA_RX_SETUP (1 << 12)
  103. #define USBA_ISO_ERR_FLOW (1 << 12)
  104. #define USBA_STALL_SENT (1 << 13)
  105. #define USBA_ISO_ERR_CRC (1 << 13)
  106. #define USBA_ISO_ERR_NBTRANS (1 << 13)
  107. #define USBA_NAK_IN (1 << 14)
  108. #define USBA_ISO_ERR_FLUSH (1 << 14)
  109. #define USBA_NAK_OUT (1 << 15)
  110. #define USBA_CURRENT_BANK_OFFSET 16
  111. #define USBA_CURRENT_BANK_SIZE 2
  112. #define USBA_BUSY_BANKS_OFFSET 18
  113. #define USBA_BUSY_BANKS_SIZE 2
  114. #define USBA_BYTE_COUNT_OFFSET 20
  115. #define USBA_BYTE_COUNT_SIZE 11
  116. #define USBA_SHORT_PACKET (1 << 31)
  117. /* Bitfields in DMA_CONTROL */
  118. #define USBA_DMA_CH_EN (1 << 0)
  119. #define USBA_DMA_LINK (1 << 1)
  120. #define USBA_DMA_END_TR_EN (1 << 2)
  121. #define USBA_DMA_END_BUF_EN (1 << 3)
  122. #define USBA_DMA_END_TR_IE (1 << 4)
  123. #define USBA_DMA_END_BUF_IE (1 << 5)
  124. #define USBA_DMA_DESC_LOAD_IE (1 << 6)
  125. #define USBA_DMA_BURST_LOCK (1 << 7)
  126. #define USBA_DMA_BUF_LEN_OFFSET 16
  127. #define USBA_DMA_BUF_LEN_SIZE 16
  128. /* Bitfields in DMA_STATUS */
  129. #define USBA_DMA_CH_ACTIVE (1 << 1)
  130. #define USBA_DMA_END_TR_ST (1 << 4)
  131. #define USBA_DMA_END_BUF_ST (1 << 5)
  132. #define USBA_DMA_DESC_LOAD_ST (1 << 6)
  133. /* Constants for SPEED_CFG */
  134. #define USBA_SPEED_CFG_NORMAL 0
  135. #define USBA_SPEED_CFG_FORCE_HIGH 2
  136. #define USBA_SPEED_CFG_FORCE_FULL 3
  137. /* Constants for EPT_SIZE */
  138. #define USBA_EPT_SIZE_8 0
  139. #define USBA_EPT_SIZE_16 1
  140. #define USBA_EPT_SIZE_32 2
  141. #define USBA_EPT_SIZE_64 3
  142. #define USBA_EPT_SIZE_128 4
  143. #define USBA_EPT_SIZE_256 5
  144. #define USBA_EPT_SIZE_512 6
  145. #define USBA_EPT_SIZE_1024 7
  146. /* Constants for EPT_TYPE */
  147. #define USBA_EPT_TYPE_CONTROL 0
  148. #define USBA_EPT_TYPE_ISO 1
  149. #define USBA_EPT_TYPE_BULK 2
  150. #define USBA_EPT_TYPE_INT 3
  151. /* Constants for BK_NUMBER */
  152. #define USBA_BK_NUMBER_ZERO 0
  153. #define USBA_BK_NUMBER_ONE 1
  154. #define USBA_BK_NUMBER_DOUBLE 2
  155. #define USBA_BK_NUMBER_TRIPLE 3
  156. /* Bit manipulation macros */
  157. #define USBA_BF(name, value) \
  158. (((value) & ((1 << USBA_##name##_SIZE) - 1)) \
  159. << USBA_##name##_OFFSET)
  160. #define USBA_BFEXT(name, value) \
  161. (((value) >> USBA_##name##_OFFSET) \
  162. & ((1 << USBA_##name##_SIZE) - 1))
  163. #define USBA_BFINS(name, value, old) \
  164. (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \
  165. << USBA_##name##_OFFSET)) \
  166. | USBA_BF(name, value))
  167. /* Register access macros */
  168. #define usba_readl(udc, reg) \
  169. __raw_readl((udc)->regs + USBA_##reg)
  170. #define usba_writel(udc, reg, value) \
  171. __raw_writel((value), (udc)->regs + USBA_##reg)
  172. #define usba_ep_readl(ep, reg) \
  173. __raw_readl((ep)->ep_regs + USBA_EPT_##reg)
  174. #define usba_ep_writel(ep, reg, value) \
  175. __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
  176. #define usba_dma_readl(ep, reg) \
  177. __raw_readl((ep)->dma_regs + USBA_DMA_##reg)
  178. #define usba_dma_writel(ep, reg, value) \
  179. __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
  180. /* Calculate base address for a given endpoint or DMA controller */
  181. #define USBA_EPT_BASE(x) (0x100 + (x) * 0x20)
  182. #define USBA_DMA_BASE(x) (0x300 + (x) * 0x10)
  183. #define USBA_FIFO_BASE(x) ((x) << 16)
  184. /* Synth parameters */
  185. #define USBA_NR_ENDPOINTS 7
  186. #define EP0_FIFO_SIZE 64
  187. #define EP0_EPT_SIZE USBA_EPT_SIZE_64
  188. #define EP0_NR_BANKS 1
  189. #define DBG_ERR 0x0001 /* report all error returns */
  190. #define DBG_HW 0x0002 /* debug hardware initialization */
  191. #define DBG_GADGET 0x0004 /* calls to/from gadget driver */
  192. #define DBG_INT 0x0008 /* interrupts */
  193. #define DBG_BUS 0x0010 /* report changes in bus state */
  194. #define DBG_QUEUE 0x0020 /* debug request queue processing */
  195. #define DBG_FIFO 0x0040 /* debug FIFO contents */
  196. #define DBG_DMA 0x0080 /* debug DMA handling */
  197. #define DBG_REQ 0x0100 /* print out queued request length */
  198. #define DBG_ALL 0xffff
  199. #define DBG_NONE 0x0000
  200. #define DEBUG_LEVEL (DBG_ERR)
  201. #define DBG(level, fmt, ...) \
  202. do { \
  203. if ((level) & DEBUG_LEVEL) \
  204. debug("udc: " fmt, ## __VA_ARGS__); \
  205. } while (0)
  206. enum usba_ctrl_state {
  207. WAIT_FOR_SETUP,
  208. DATA_STAGE_IN,
  209. DATA_STAGE_OUT,
  210. STATUS_STAGE_IN,
  211. STATUS_STAGE_OUT,
  212. STATUS_STAGE_ADDR,
  213. STATUS_STAGE_TEST,
  214. };
  215. struct usba_dma_desc {
  216. dma_addr_t next;
  217. dma_addr_t addr;
  218. u32 ctrl;
  219. };
  220. struct usba_ep {
  221. int state;
  222. void *ep_regs;
  223. void *dma_regs;
  224. void *fifo;
  225. struct usb_ep ep;
  226. struct usba_udc *udc;
  227. struct list_head queue;
  228. u16 fifo_size;
  229. u8 nr_banks;
  230. u8 index;
  231. unsigned int can_dma:1;
  232. unsigned int can_isoc:1;
  233. unsigned int is_isoc:1;
  234. unsigned int is_in:1;
  235. const struct usb_endpoint_descriptor *desc;
  236. };
  237. struct usba_request {
  238. struct usb_request req;
  239. struct list_head queue;
  240. u32 ctrl;
  241. unsigned int submitted:1;
  242. unsigned int last_transaction:1;
  243. unsigned int using_dma:1;
  244. unsigned int mapped:1;
  245. };
  246. struct usba_udc {
  247. void *regs;
  248. void *fifo;
  249. struct usb_gadget gadget;
  250. struct usb_gadget_driver *driver;
  251. struct platform_device *pdev;
  252. int irq;
  253. int vbus_pin;
  254. int vbus_pin_inverted;
  255. int num_ep;
  256. struct usba_ep *usba_ep;
  257. u16 devstatus;
  258. u16 test_mode;
  259. int vbus_prev;
  260. };
  261. static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
  262. {
  263. return container_of(ep, struct usba_ep, ep);
  264. }
  265. static inline struct usba_request *to_usba_req(struct usb_request *req)
  266. {
  267. return container_of(req, struct usba_request, req);
  268. }
  269. static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
  270. {
  271. return container_of(gadget, struct usba_udc, gadget);
  272. }
  273. #define ep_is_control(ep) ((ep)->index == 0)
  274. #define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE)
  275. #endif /* __LINUX_USB_GADGET_USBA_UDC_H */