lan75xx.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
  4. */
  5. #include <dm.h>
  6. #include <log.h>
  7. #include <usb.h>
  8. #include <linux/bitops.h>
  9. #include <linux/mii.h>
  10. #include "usb_ether.h"
  11. #include "lan7x.h"
  12. /* LAN75xx specific register/bit defines */
  13. #define LAN75XX_HW_CFG_BIR BIT(7)
  14. #define LAN75XX_BURST_CAP 0x034
  15. #define LAN75XX_BULK_IN_DLY 0x03C
  16. #define LAN75XX_RFE_CTL 0x060
  17. #define LAN75XX_FCT_RX_CTL 0x090
  18. #define LAN75XX_FCT_TX_CTL 0x094
  19. #define LAN75XX_FCT_RX_FIFO_END 0x098
  20. #define LAN75XX_FCT_TX_FIFO_END 0x09C
  21. #define LAN75XX_FCT_FLOW 0x0A0
  22. /* MAC ADDRESS PERFECT FILTER For LAN75xx */
  23. #define LAN75XX_ADDR_FILTX 0x300
  24. #define LAN75XX_ADDR_FILTX_FB_VALID BIT(31)
  25. /*
  26. * Lan75xx infrastructure commands
  27. */
  28. static int lan75xx_phy_gig_workaround(struct usb_device *udev,
  29. struct ueth_data *dev)
  30. {
  31. int ret = 0;
  32. /* Only internal phy */
  33. /* Set the phy in Gig loopback */
  34. lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
  35. (BMCR_LOOPBACK | BMCR_SPEED1000));
  36. /* Wait for the link up */
  37. ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
  38. dev->phy_id, MII_BMSR, BMSR_LSTATUS,
  39. true, PHY_CONNECT_TIMEOUT_MS, 1);
  40. if (ret)
  41. return ret;
  42. /* phy reset */
  43. return lan7x_pmt_phy_reset(udev, dev);
  44. }
  45. static int lan75xx_update_flowcontrol(struct usb_device *udev,
  46. struct ueth_data *dev)
  47. {
  48. uint32_t flow = 0, fct_flow = 0;
  49. int ret;
  50. ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
  51. if (ret)
  52. return ret;
  53. ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
  54. if (ret)
  55. return ret;
  56. return lan7x_write_reg(udev, FLOW, flow);
  57. }
  58. static int lan75xx_set_receive_filter(struct usb_device *udev)
  59. {
  60. /* No multicast in u-boot */
  61. return lan7x_write_reg(udev, LAN75XX_RFE_CTL,
  62. RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
  63. }
  64. /* starts the TX path */
  65. static void lan75xx_start_tx_path(struct usb_device *udev)
  66. {
  67. /* Enable Tx at MAC */
  68. lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
  69. /* Enable Tx at SCSRs */
  70. lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);
  71. }
  72. /* Starts the Receive path */
  73. static void lan75xx_start_rx_path(struct usb_device *udev)
  74. {
  75. /* Enable Rx at MAC */
  76. lan7x_write_reg(udev, MAC_RX,
  77. LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
  78. MAC_RX_FCS_STRIP | MAC_RX_RXEN);
  79. /* Enable Rx at SCSRs */
  80. lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);
  81. }
  82. static int lan75xx_basic_reset(struct usb_device *udev,
  83. struct ueth_data *dev,
  84. struct lan7x_private *priv)
  85. {
  86. int ret;
  87. u32 val;
  88. ret = lan7x_basic_reset(udev, dev);
  89. if (ret)
  90. return ret;
  91. /* Keep the chip ID */
  92. ret = lan7x_read_reg(udev, ID_REV, &val);
  93. if (ret)
  94. return ret;
  95. debug("LAN75xx ID_REV = 0x%08x\n", val);
  96. priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
  97. /* Respond to the IN token with a NAK */
  98. ret = lan7x_read_reg(udev, HW_CFG, &val);
  99. if (ret)
  100. return ret;
  101. val |= LAN75XX_HW_CFG_BIR;
  102. return lan7x_write_reg(udev, HW_CFG, val);
  103. }
  104. int lan75xx_write_hwaddr(struct udevice *dev)
  105. {
  106. struct usb_device *udev = dev_get_parent_priv(dev);
  107. struct eth_pdata *pdata = dev_get_platdata(dev);
  108. unsigned char *enetaddr = pdata->enetaddr;
  109. u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
  110. u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
  111. int ret;
  112. /* set hardware address */
  113. ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
  114. if (ret)
  115. return ret;
  116. ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
  117. if (ret)
  118. return ret;
  119. ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);
  120. if (ret)
  121. return ret;
  122. addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID;
  123. ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);
  124. if (ret)
  125. return ret;
  126. debug("MAC addr %pM written\n", enetaddr);
  127. return 0;
  128. }
  129. static int lan75xx_eth_start(struct udevice *dev)
  130. {
  131. struct usb_device *udev = dev_get_parent_priv(dev);
  132. struct lan7x_private *priv = dev_get_priv(dev);
  133. struct ueth_data *ueth = &priv->ueth;
  134. int ret;
  135. u32 write_buf;
  136. /* Reset and read Mac addr were done in probe() */
  137. ret = lan75xx_write_hwaddr(dev);
  138. if (ret)
  139. return ret;
  140. ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
  141. if (ret)
  142. return ret;
  143. ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);
  144. if (ret)
  145. return ret;
  146. ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
  147. if (ret)
  148. return ret;
  149. /* set FIFO sizes */
  150. write_buf = (MAX_RX_FIFO_SIZE - 512) / 512;
  151. ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);
  152. if (ret)
  153. return ret;
  154. write_buf = (MAX_TX_FIFO_SIZE - 512) / 512;
  155. ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);
  156. if (ret)
  157. return ret;
  158. /* Init Tx */
  159. ret = lan7x_write_reg(udev, FLOW, 0);
  160. if (ret)
  161. return ret;
  162. /* Init Rx. Set Vlan, keep default for VLAN on 75xx */
  163. ret = lan75xx_set_receive_filter(udev);
  164. if (ret)
  165. return ret;
  166. /* phy workaround for gig link */
  167. ret = lan75xx_phy_gig_workaround(udev, ueth);
  168. if (ret)
  169. return ret;
  170. /* Init PHY, autonego, and link */
  171. ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
  172. if (ret)
  173. return ret;
  174. ret = lan7x_eth_phylib_config_start(dev);
  175. if (ret)
  176. return ret;
  177. /*
  178. * MAC_CR has to be set after PHY init.
  179. * MAC will auto detect the PHY speed.
  180. */
  181. ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
  182. if (ret)
  183. return ret;
  184. write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
  185. ret = lan7x_write_reg(udev, MAC_CR, write_buf);
  186. if (ret)
  187. return ret;
  188. lan75xx_start_tx_path(udev);
  189. lan75xx_start_rx_path(udev);
  190. return lan75xx_update_flowcontrol(udev, ueth);
  191. }
  192. int lan75xx_read_rom_hwaddr(struct udevice *dev)
  193. {
  194. struct usb_device *udev = dev_get_parent_priv(dev);
  195. struct eth_pdata *pdata = dev_get_platdata(dev);
  196. int ret;
  197. /*
  198. * Refer to the doc/README.enetaddr and doc/README.usb for
  199. * the U-Boot MAC address policy
  200. */
  201. ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev);
  202. if (ret)
  203. memset(pdata->enetaddr, 0, 6);
  204. return 0;
  205. }
  206. static int lan75xx_eth_probe(struct udevice *dev)
  207. {
  208. struct usb_device *udev = dev_get_parent_priv(dev);
  209. struct lan7x_private *priv = dev_get_priv(dev);
  210. struct ueth_data *ueth = &priv->ueth;
  211. struct eth_pdata *pdata = dev_get_platdata(dev);
  212. int ret;
  213. /* Do a reset in order to get the MAC address from HW */
  214. if (lan75xx_basic_reset(udev, ueth, priv))
  215. return 0;
  216. /* Get the MAC address */
  217. /*
  218. * We must set the eth->enetaddr from HW because the upper layer
  219. * will force to use the environmental var (usbethaddr) or random if
  220. * there is no valid MAC address in eth->enetaddr.
  221. *
  222. * Refer to the doc/README.enetaddr and doc/README.usb for
  223. * the U-Boot MAC address policy
  224. */
  225. lan7x_read_eeprom_mac(pdata->enetaddr, udev);
  226. /* Do not return 0 for not finding MAC addr in HW */
  227. ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
  228. if (ret)
  229. return ret;
  230. /* Register phylib */
  231. return lan7x_phylib_register(dev);
  232. }
  233. static const struct eth_ops lan75xx_eth_ops = {
  234. .start = lan75xx_eth_start,
  235. .send = lan7x_eth_send,
  236. .recv = lan7x_eth_recv,
  237. .free_pkt = lan7x_free_pkt,
  238. .stop = lan7x_eth_stop,
  239. .write_hwaddr = lan75xx_write_hwaddr,
  240. .read_rom_hwaddr = lan75xx_read_rom_hwaddr,
  241. };
  242. U_BOOT_DRIVER(lan75xx_eth) = {
  243. .name = "lan75xx_eth",
  244. .id = UCLASS_ETH,
  245. .probe = lan75xx_eth_probe,
  246. .remove = lan7x_eth_remove,
  247. .ops = &lan75xx_eth_ops,
  248. .priv_auto_alloc_size = sizeof(struct lan7x_private),
  249. .platdata_auto_alloc_size = sizeof(struct eth_pdata),
  250. };
  251. static const struct usb_device_id lan75xx_eth_id_table[] = {
  252. { USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */
  253. { } /* Terminating entry */
  254. };
  255. U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table);