omap-timer.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * TI OMAP timer driver
  4. *
  5. * Copyright (C) 2015, Texas Instruments, Incorporated
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <timer.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/clock.h>
  13. #include <linux/bitops.h>
  14. /* Timer register bits */
  15. #define TCLR_START BIT(0) /* Start=1 */
  16. #define TCLR_AUTO_RELOAD BIT(1) /* Auto reload */
  17. #define TCLR_PRE_EN BIT(5) /* Pre-scaler enable */
  18. #define TCLR_PTV_SHIFT (2) /* Pre-scaler shift value */
  19. #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
  20. struct omap_gptimer_regs {
  21. unsigned int tidr; /* offset 0x00 */
  22. unsigned char res1[12];
  23. unsigned int tiocp_cfg; /* offset 0x10 */
  24. unsigned char res2[12];
  25. unsigned int tier; /* offset 0x20 */
  26. unsigned int tistatr; /* offset 0x24 */
  27. unsigned int tistat; /* offset 0x28 */
  28. unsigned int tisr; /* offset 0x2c */
  29. unsigned int tcicr; /* offset 0x30 */
  30. unsigned int twer; /* offset 0x34 */
  31. unsigned int tclr; /* offset 0x38 */
  32. unsigned int tcrr; /* offset 0x3c */
  33. unsigned int tldr; /* offset 0x40 */
  34. unsigned int ttgr; /* offset 0x44 */
  35. unsigned int twpc; /* offset 0x48 */
  36. unsigned int tmar; /* offset 0x4c */
  37. unsigned int tcar1; /* offset 0x50 */
  38. unsigned int tscir; /* offset 0x54 */
  39. unsigned int tcar2; /* offset 0x58 */
  40. };
  41. /* Omap Timer Priv */
  42. struct omap_timer_priv {
  43. struct omap_gptimer_regs *regs;
  44. };
  45. static u64 omap_timer_get_count(struct udevice *dev)
  46. {
  47. struct omap_timer_priv *priv = dev_get_priv(dev);
  48. return timer_conv_64(readl(&priv->regs->tcrr));
  49. }
  50. static int omap_timer_probe(struct udevice *dev)
  51. {
  52. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  53. struct omap_timer_priv *priv = dev_get_priv(dev);
  54. if (!uc_priv->clock_rate)
  55. uc_priv->clock_rate = TIMER_CLOCK;
  56. /* start the counter ticking up, reload value on overflow */
  57. writel(0, &priv->regs->tldr);
  58. writel(0, &priv->regs->tcrr);
  59. /* enable timer */
  60. writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
  61. TCLR_START, &priv->regs->tclr);
  62. return 0;
  63. }
  64. static int omap_timer_ofdata_to_platdata(struct udevice *dev)
  65. {
  66. struct omap_timer_priv *priv = dev_get_priv(dev);
  67. priv->regs = map_physmem(dev_read_addr(dev),
  68. sizeof(struct omap_gptimer_regs), MAP_NOCACHE);
  69. return 0;
  70. }
  71. static const struct timer_ops omap_timer_ops = {
  72. .get_count = omap_timer_get_count,
  73. };
  74. static const struct udevice_id omap_timer_ids[] = {
  75. { .compatible = "ti,am335x-timer" },
  76. { .compatible = "ti,am4372-timer" },
  77. { .compatible = "ti,omap5430-timer" },
  78. {}
  79. };
  80. U_BOOT_DRIVER(omap_timer) = {
  81. .name = "omap_timer",
  82. .id = UCLASS_TIMER,
  83. .of_match = omap_timer_ids,
  84. .ofdata_to_platdata = omap_timer_ofdata_to_platdata,
  85. .priv_auto_alloc_size = sizeof(struct omap_timer_priv),
  86. .probe = omap_timer_probe,
  87. .ops = &omap_timer_ops,
  88. };