sysreset_rockchip.c 1.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2017 Rockchip Electronics Co., Ltd
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <sysreset.h>
  9. #include <asm/io.h>
  10. #include <asm/arch-rockchip/clock.h>
  11. #include <asm/arch-rockchip/cru_rk3328.h>
  12. #include <asm/arch-rockchip/hardware.h>
  13. #include <linux/err.h>
  14. int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
  15. {
  16. struct sysreset_reg *offset = dev_get_priv(dev);
  17. unsigned long cru_base = (unsigned long)rockchip_get_cru();
  18. if (IS_ERR_VALUE(cru_base))
  19. return (int)cru_base;
  20. switch (type) {
  21. case SYSRESET_WARM:
  22. writel(0xeca8, cru_base + offset->glb_srst_snd_value);
  23. break;
  24. case SYSRESET_COLD:
  25. writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
  26. break;
  27. default:
  28. return -EPROTONOSUPPORT;
  29. }
  30. return -EINPROGRESS;
  31. }
  32. static struct sysreset_ops rockchip_sysreset = {
  33. .request = rockchip_sysreset_request,
  34. };
  35. U_BOOT_DRIVER(sysreset_rockchip) = {
  36. .name = "rockchip_sysreset",
  37. .id = UCLASS_SYSRESET,
  38. .ops = &rockchip_sysreset,
  39. };