serial_sifive.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Anup Patel <anup@brainfault.org>
  4. */
  5. #include <common.h>
  6. #include <clk.h>
  7. #include <debug_uart.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <log.h>
  12. #include <watchdog.h>
  13. #include <asm/io.h>
  14. #include <linux/compiler.h>
  15. #include <serial.h>
  16. #include <linux/err.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. #define UART_TXFIFO_FULL 0x80000000
  19. #define UART_RXFIFO_EMPTY 0x80000000
  20. #define UART_RXFIFO_DATA 0x000000ff
  21. #define UART_TXCTRL_TXEN 0x1
  22. #define UART_RXCTRL_RXEN 0x1
  23. /* IP register */
  24. #define UART_IP_RXWM 0x2
  25. struct uart_sifive {
  26. u32 txfifo;
  27. u32 rxfifo;
  28. u32 txctrl;
  29. u32 rxctrl;
  30. u32 ie;
  31. u32 ip;
  32. u32 div;
  33. };
  34. struct sifive_uart_platdata {
  35. unsigned long clock;
  36. struct uart_sifive *regs;
  37. };
  38. /**
  39. * Find minimum divisor divides in_freq to max_target_hz;
  40. * Based on uart driver n SiFive FSBL.
  41. *
  42. * f_baud = f_in / (div + 1) => div = (f_in / f_baud) - 1
  43. * The nearest integer solution requires rounding up as to not exceed
  44. * max_target_hz.
  45. * div = ceil(f_in / f_baud) - 1
  46. * = floor((f_in - 1 + f_baud) / f_baud) - 1
  47. * This should not overflow as long as (f_in - 1 + f_baud) does not exceed
  48. * 2^32 - 1, which is unlikely since we represent frequencies in kHz.
  49. */
  50. static inline unsigned int uart_min_clk_divisor(unsigned long in_freq,
  51. unsigned long max_target_hz)
  52. {
  53. unsigned long quotient =
  54. (in_freq + max_target_hz - 1) / (max_target_hz);
  55. /* Avoid underflow */
  56. if (quotient == 0)
  57. return 0;
  58. else
  59. return quotient - 1;
  60. }
  61. /* Set up the baud rate in gd struct */
  62. static void _sifive_serial_setbrg(struct uart_sifive *regs,
  63. unsigned long clock, unsigned long baud)
  64. {
  65. writel((uart_min_clk_divisor(clock, baud)), &regs->div);
  66. }
  67. static void _sifive_serial_init(struct uart_sifive *regs)
  68. {
  69. writel(UART_TXCTRL_TXEN, &regs->txctrl);
  70. writel(UART_RXCTRL_RXEN, &regs->rxctrl);
  71. writel(0, &regs->ie);
  72. }
  73. static int _sifive_serial_putc(struct uart_sifive *regs, const char c)
  74. {
  75. if (readl(&regs->txfifo) & UART_TXFIFO_FULL)
  76. return -EAGAIN;
  77. writel(c, &regs->txfifo);
  78. return 0;
  79. }
  80. static int _sifive_serial_getc(struct uart_sifive *regs)
  81. {
  82. int ch = readl(&regs->rxfifo);
  83. if (ch & UART_RXFIFO_EMPTY)
  84. return -EAGAIN;
  85. ch &= UART_RXFIFO_DATA;
  86. return ch;
  87. }
  88. static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
  89. {
  90. int ret;
  91. struct clk clk;
  92. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  93. u32 clock = 0;
  94. ret = clk_get_by_index(dev, 0, &clk);
  95. if (IS_ERR_VALUE(ret)) {
  96. debug("SiFive UART failed to get clock\n");
  97. ret = dev_read_u32(dev, "clock-frequency", &clock);
  98. if (IS_ERR_VALUE(ret)) {
  99. debug("SiFive UART clock not defined\n");
  100. return 0;
  101. }
  102. } else {
  103. clock = clk_get_rate(&clk);
  104. if (IS_ERR_VALUE(clock)) {
  105. debug("SiFive UART clock get rate failed\n");
  106. return 0;
  107. }
  108. }
  109. platdata->clock = clock;
  110. _sifive_serial_setbrg(platdata->regs, platdata->clock, baudrate);
  111. return 0;
  112. }
  113. static int sifive_serial_probe(struct udevice *dev)
  114. {
  115. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  116. /* No need to reinitialize the UART after relocation */
  117. if (gd->flags & GD_FLG_RELOC)
  118. return 0;
  119. _sifive_serial_init(platdata->regs);
  120. return 0;
  121. }
  122. static int sifive_serial_getc(struct udevice *dev)
  123. {
  124. int c;
  125. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  126. struct uart_sifive *regs = platdata->regs;
  127. while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
  128. return c;
  129. }
  130. static int sifive_serial_putc(struct udevice *dev, const char ch)
  131. {
  132. int rc;
  133. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  134. while ((rc = _sifive_serial_putc(platdata->regs, ch)) == -EAGAIN) ;
  135. return rc;
  136. }
  137. static int sifive_serial_pending(struct udevice *dev, bool input)
  138. {
  139. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  140. struct uart_sifive *regs = platdata->regs;
  141. if (input)
  142. return (readl(&regs->ip) & UART_IP_RXWM);
  143. else
  144. return !!(readl(&regs->txfifo) & UART_TXFIFO_FULL);
  145. }
  146. static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
  147. {
  148. struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
  149. platdata->regs = (struct uart_sifive *)dev_read_addr(dev);
  150. if (IS_ERR(platdata->regs))
  151. return PTR_ERR(platdata->regs);
  152. return 0;
  153. }
  154. static const struct dm_serial_ops sifive_serial_ops = {
  155. .putc = sifive_serial_putc,
  156. .getc = sifive_serial_getc,
  157. .pending = sifive_serial_pending,
  158. .setbrg = sifive_serial_setbrg,
  159. };
  160. static const struct udevice_id sifive_serial_ids[] = {
  161. { .compatible = "sifive,uart0" },
  162. { }
  163. };
  164. U_BOOT_DRIVER(serial_sifive) = {
  165. .name = "serial_sifive",
  166. .id = UCLASS_SERIAL,
  167. .of_match = sifive_serial_ids,
  168. .ofdata_to_platdata = sifive_serial_ofdata_to_platdata,
  169. .platdata_auto_alloc_size = sizeof(struct sifive_uart_platdata),
  170. .probe = sifive_serial_probe,
  171. .ops = &sifive_serial_ops,
  172. };
  173. #ifdef CONFIG_DEBUG_UART_SIFIVE
  174. static inline void _debug_uart_init(void)
  175. {
  176. struct uart_sifive *regs =
  177. (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
  178. _sifive_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK,
  179. CONFIG_BAUDRATE);
  180. _sifive_serial_init(regs);
  181. }
  182. static inline void _debug_uart_putc(int ch)
  183. {
  184. struct uart_sifive *regs =
  185. (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
  186. while (_sifive_serial_putc(regs, ch) == -EAGAIN)
  187. WATCHDOG_RESET();
  188. }
  189. DEBUG_UART_FUNCS
  190. #endif