serial_owl.c 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Actions Semi OWL SoCs UART driver
  4. *
  5. * Copyright (C) 2015 Actions Semi Co., Ltd.
  6. * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <dm.h>
  11. #include <errno.h>
  12. #include <fdtdec.h>
  13. #include <serial.h>
  14. #include <asm/io.h>
  15. #include <asm/types.h>
  16. #include <linux/bitops.h>
  17. /* UART Registers */
  18. #define OWL_UART_CTL (0x0000)
  19. #define OWL_UART_RXDAT (0x0004)
  20. #define OWL_UART_TXDAT (0x0008)
  21. #define OWL_UART_STAT (0x000C)
  22. /* UART_CTL Register Definitions */
  23. #define OWL_UART_CTL_PRS_NONE GENMASK(6, 4)
  24. #define OWL_UART_CTL_STPS BIT(2)
  25. #define OWL_UART_CTL_DWLS 3
  26. /* UART_STAT Register Definitions */
  27. #define OWL_UART_STAT_TFES BIT(10) /* TX FIFO Empty Status */
  28. #define OWL_UART_STAT_RFFS BIT(9) /* RX FIFO full Status */
  29. #define OWL_UART_STAT_TFFU BIT(6) /* TX FIFO full Status */
  30. #define OWL_UART_STAT_RFEM BIT(5) /* RX FIFO Empty Status */
  31. struct owl_serial_priv {
  32. phys_addr_t base;
  33. };
  34. int owl_serial_setbrg(struct udevice *dev, int baudrate)
  35. {
  36. /* Driver supports only fixed baudrate */
  37. return 0;
  38. }
  39. static int owl_serial_getc(struct udevice *dev)
  40. {
  41. struct owl_serial_priv *priv = dev_get_priv(dev);
  42. if (readl(priv->base + OWL_UART_STAT) & OWL_UART_STAT_RFEM)
  43. return -EAGAIN;
  44. return (int)(readl(priv->base + OWL_UART_RXDAT));
  45. }
  46. static int owl_serial_putc(struct udevice *dev, const char ch)
  47. {
  48. struct owl_serial_priv *priv = dev_get_priv(dev);
  49. if (readl(priv->base + OWL_UART_STAT) & OWL_UART_STAT_TFFU)
  50. return -EAGAIN;
  51. writel(ch, priv->base + OWL_UART_TXDAT);
  52. return 0;
  53. }
  54. static int owl_serial_pending(struct udevice *dev, bool input)
  55. {
  56. struct owl_serial_priv *priv = dev_get_priv(dev);
  57. unsigned int stat = readl(priv->base + OWL_UART_STAT);
  58. if (input)
  59. return !(stat & OWL_UART_STAT_RFEM);
  60. else
  61. return !(stat & OWL_UART_STAT_TFES);
  62. }
  63. static int owl_serial_probe(struct udevice *dev)
  64. {
  65. struct owl_serial_priv *priv = dev_get_priv(dev);
  66. struct clk clk;
  67. u32 uart_ctl;
  68. int ret;
  69. /* Set data, parity and stop bits */
  70. uart_ctl = readl(priv->base + OWL_UART_CTL);
  71. uart_ctl &= ~(OWL_UART_CTL_PRS_NONE);
  72. uart_ctl &= ~(OWL_UART_CTL_STPS);
  73. uart_ctl |= OWL_UART_CTL_DWLS;
  74. writel(uart_ctl, priv->base + OWL_UART_CTL);
  75. /* Enable UART clock */
  76. ret = clk_get_by_index(dev, 0, &clk);
  77. if (ret < 0)
  78. return ret;
  79. ret = clk_enable(&clk);
  80. if (ret < 0)
  81. return ret;
  82. return 0;
  83. }
  84. static int owl_serial_ofdata_to_platdata(struct udevice *dev)
  85. {
  86. struct owl_serial_priv *priv = dev_get_priv(dev);
  87. priv->base = dev_read_addr(dev);
  88. if (priv->base == FDT_ADDR_T_NONE)
  89. return -EINVAL;
  90. return 0;
  91. }
  92. static const struct dm_serial_ops owl_serial_ops = {
  93. .putc = owl_serial_putc,
  94. .pending = owl_serial_pending,
  95. .getc = owl_serial_getc,
  96. .setbrg = owl_serial_setbrg,
  97. };
  98. static const struct udevice_id owl_serial_ids[] = {
  99. { .compatible = "actions,owl-uart" },
  100. { }
  101. };
  102. U_BOOT_DRIVER(serial_owl) = {
  103. .name = "serial_owl",
  104. .id = UCLASS_SERIAL,
  105. .of_match = owl_serial_ids,
  106. .ofdata_to_platdata = owl_serial_ofdata_to_platdata,
  107. .priv_auto_alloc_size = sizeof(struct owl_serial_priv),
  108. .probe = owl_serial_probe,
  109. .ops = &owl_serial_ops,
  110. };